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Samsung Semiconductor - (K4Q153211M / K4Q153212M) 512kx32bit CMOS Quad Casdram

Numéro de référence K4Q153211M
Description (K4Q153211M / K4Q153212M) 512kx32bit CMOS Quad Casdram
Fabricant Samsung Semiconductor 
Logo Samsung Semiconductor 





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K4Q153211M fiche technique
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K4Q153211M, K4Q153212M
CMOS DRAM
512K x 32Bit CMOS Quad CAS DRAM with EDO
DESCRIPTION
This is a 524,288 x 32 bit Extended Data Out CMOS DRAM. Extended Data Out Mode offers high speed random access of memory cells
within the same row, so called Hyper Page Mode. Power supply voltage (+5.0V or +3.3V), refresh cycle 1K, access time (-50 or -60),
power consumption(Normal or Low power) and SOJ package type are optional features of this family. All of this family have CAS-before-
RAS refresh, RAS-only refresh and Hidden refresh capabilities. Furthermore, Self-refresh operation is available in L-version. This
512Kx32 EDO Mode Quad CAS DRAM is fabricated using Samsung's advanced CMOS process to realize high band-width, low power
consumption and high reliability.
FEATURES
Part Identification
- K4Q153211M-JC (5.0V, 1K Ref.)
- K4Q153211M-JL (5.0V, 1K Ref. LP)
- K4Q153212M-JC (3.3V, 1K Ref.)
- K4Q153212M-JL (3.3V, 1K Ref. LP)
Active Power Dissipation
Speed
-50
-60
3.3V
-
540
Unit : mW
5.0V
880
825
• Extended Data Out Mode operation
(Fast Page Mode with Extended Data Out)
• Four separate CAS pins provide for separate I/O operation
• CAS-before-RAS refresh capability
• RAS-only and Hidden refresh capability
• Self-refresh capability (L-ver only)
• TTL(5V)/LVTTL(3.3V) compatible inputs and outputs
• Early Write or output enable controlled write
• JEDEC Standard pinout
• Plastic SOJ 400mil x 1125mil package
• Single +5.0V±0.5V power supply(5V product)
• Single +3.3V±0.3V power supply(3.3V product)
Refresh Cycles
Part
NO.
153211M-J
153212M-J
VCC Refresh
cycle
5.0V 1K
3.3V 1K
Refresh period
Normal L-ver
16ms 128ms
16ms 128ms
Performance Range
Speed
-50
-60
tRAC
50ns
60ns
tCAC
15ns
17ns
tRC
84ns
104ns
tHPC
20ns
27ns
Remark
5.0V only
5V/3.3V
FUNCTIONAL BLOCK DIAGRAM
RAS
CAS0-3
W
A0 - A9
A0 - A8
Control
Clocks
VBB Generator
Vcc
Vss
Refresh Timer
Refresh Control
Refresh Counter
Row Address Buffer
Col. Address Buffer
Row Decoder
Memory
Array
524,288 x 32
Cells
Column Decoder
CAS0
D/I Buffer
CAS0
D/O Buffer
CAS1
D/I Buffer
CAS1
D/O Buffer
CAS2
D/I Buffer
CAS2
D/O Buffer
CAS3
D/I Buffer
CAS3
D/O Buffer
DQ0
to
DQ7
DQ8
to
DQ15
OE
DQ16
to
DQ23
DQ24
to
DQ31
SAMSUNG ELECTRONICS CO., LTD. reserves the right to
change products and specifications without notice.

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