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PDF ADT7490 Data sheet ( Hoja de datos )
| Número de pieza | ADT7490 | |
| Descripción | dBCool Remote Thermal Monitor and Fan Controller | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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dBCool Remote Thermal Monitor and Fan
Controller with PECI Interface
ADT7490
FEATURES
Temperature measurement:
1 local on-chip temperature sensor
2 remote temperature sensors
3-current external temperature sensors with series
resistance cancellation (SRC)
PECI interface for CPU thermal information and support of
up to 4 PECI inputs on one pin
Fan drive and fan speed control
3 high frequency or low frequency PWM outputs for use
with 3-wire or 4-wire fans
4 TACH inputs to measure fan speed
OS independent automatic fan speed control based on
thermal information
Dynamic TMIN control mode to optimize system acoustics
Default startup at 100% PWM for all fans for robust
operation
Bidirectional THERM/SMBALERT pin to flag out-of-limit and
overtemperature conditions
GPIO functionality to support extra features
Can be used for loadline setting for voltage regulation,
LED control, or other functions
IMON monitoring for CPU current and power information
Footprint and register compatible with ADT7473/ADT7475/
ADT7476/ADT7476A family of fan controllers
SMBus interface with addressing capability for up to
3 devices
APPLICATIONS
Personal Computers
Servers
GENERAL DESCRIPTION
The ADT7490 is a dBCool® thermal monitor and multiple
PWM fan controller for noise-sensitive or power-sensitive
applications requiring active system cooling. The ADT7490
includes a local temperature sensor, two remote temperature
sensors including series resistance cancellation, and monitors
CPU temperature with a PECI interface. The ADT7490 can
drive a fan using either a low or high frequency drive signal,
and measure and control the speed of up to four fans so they
operate at the lowest possible speed for minimum acoustic noise.
The automatic fan speed control loop optimizes fan speed
for a given temperature using the PECI, remote, or local
temperature information. The effectiveness of the system’s
thermal solution can be monitored using the THERM input.
The ADT7490 also provides critical thermal protection to
the system using the bidirectional THERM/SMBALERT pin as
an output to prevent system or component overheating.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2007 Analog Devices, Inc. All rights reserved.
1 page  
ADT7490
Parameter
OPEN-DRAIN SERIAL DATA BUS OUTPUT (SDA)
Output Low Voltage, VOL
High Level Output Current, IOH
SMBus DIGITAL INPUTS (SCL, SDA)
Input High Voltage, VIH
Input Low Voltage, VIL
Hysteresis
Digital I/O (PECI PIN)1
VTT, Supply Voltage
Input High Voltage , VIH
Input Low Voltage, VIL
Hysteresis1
High Level Output Source Current, ISOURCE
Low Level Output Sink Current, ISINK
Signal Noise Immunity, VNOISE
Min
2.0
0.95
0.55 × VTT2
0.1 × VTT2
0.5
300
Typ
0.1
500
DIGITAL INPUT LOGIC LEVELS (TACH1 to
TACH3)
Input High Voltage, VIH
2.0
Input Low Voltage, VIL
Hysteresis
DIGITAL INPUT LOGIC LEVELS (THERM)
Input High Voltage, VIH
Input Low Voltage, VIL
DIGITAL INPUT CURRENT
Input High Current, IIH
Input Low Current, IIL
Input Capacitance, CIN
SERIAL BUS TIMING1
Clock Frequency, fSCLK
Glitch Immunity, tSW
Bus Free Time, tBUF
SCL Low Time, tLOW
SCL High Time, tHIGH
SCL, SDA Rise Time, tR
SCL, SDA Fall Time, tF
Data Setup Time, tSU;DAT
Detect Clock Low Timeout, tTIMEOUT
−0.3
0.5
±1
±1
5
10
4.7
4.7
4.0
250
15
Max Unit Test Conditions/Comments
0.4 V IOUT = −4.0 mA
1.0 μA VOUT = VCC
V
0.4 V
mV
1.26 V
0.5 × VTT2
6
1.0
V
V
mV
mA
mA
mV p-p
Hysteresis between input switching levels
VOH = 0.75 × VTT
VOL = 0.25 × VTT
Noise glitches from 10 MHz to 100 MHz,
width up to 50 ns
V
5.5 V
0.8 V
V
V p-p
0.75 × VCC V
0.4 V
μA
μA
pF
400
50
50
1000
300
35
kHz
ns
μs
μs
μs
ns
μs
ns
ms
Maximum input voltage
Minimum input voltage
VIN = VCC
VIN = 0
See Figure 2
Can be optionally disabled
1 Guaranteed by design, not production tested.
2 VTT is the voltage input on Pin 8. The VTT voltage is determined by the processor installed on the system.
SCL
tLOW tR
tF
tHD;STA
tHD;STA
tHD;DAT
tHIGH
tSU;DAT
tSU;STA
tSU;STO
SDA
tBUF
PS
S
Figure 2. SMBus Timing Diagram
Rev. 0 | Page 5 of 76
P
5 Page 
1.5
1.0 DEV 2
DEV 1
0.5 DEV 3
0
–0.5
–1.0
–1.5
–2.0
3.0 3.1 3.2 3.3 3.4 3.5
VDD (V)
Figure 16. TACH Accuracy vs. Power Supply
3.6
ADT7490
8
6 DEV 3
4
2
DEV 2
0
DEV 1
–2
–4
–6
–8
–40
–20
0 20 40 60 80
TEMPERATURE (°C)
100 120
Figure 17. TACH Accuracy vs. Temperature
Rev. 0 | Page 11 of 76
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet ADT7490.PDF ] | |
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