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Número de pieza | GM5020-H | |
Descripción | Graphics Processing IC providing high-quality images | |
Fabricantes | Genesis | |
Logotipo | ||
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Genesis Microchip Publication
DATA SHEET
gm5020/gm5020-H
Sections in this document and all other related documentation that mention HDCP refer
only to the gm5020-H (HDCP-enabled) chip. All other sections apply to both the gm5020-H
chip and the gm5020 (non-HDCP) chip.
Publication number: C5020-DAT-01Q
Publication date: February 2002
Genesis Microchip Inc.
165 Commerce Valley Dr. West • Thornhill • ON • Canada L3T 7V8 • Tel: (905) 889-5400 • Fax: (905) 889-5422
2150 Gold Street • PO Box 2150 • Alviso • CA • USA 95002 • Tel: (408) 262-6599 • Fax: (408) 262-6365
4F, No. 24, Ln 123, Sec 6, Min-Chung E. Rd. • Taipei • Taiwan • Tel: (2) 2791-0118 • Fax: (2) 2791-0196
143-37 Hyundai Tower • Unit 902 • Samsung-dong • Kangnam-gu • Seoul • Korea • 135-090 • Tel: (82-2) 553-5693 • Fax: (82-2) 552-4942
www.genesis-microchip.com / [email protected]
1 page Genesis Microchip
gm5020/gm5020-H Data Sheet
Table of Contents
1. Overview ................................................................................................................................... 1
1.1 gm5020 System Design Example....................................................................................... 2
1.2 gm5020/gm5020-H Features .............................................................................................. 3
2. Pinout Diagram ......................................................................................................................... 4
3. Pin List ...................................................................................................................................... 6
4. Functional Description............................................................................................................. 12
4.1 Clocking Options............................................................................................................... 13
4.1.1 TCLK Requirements............................................................................................... 13
4.1.2 Synthesized Clocks ................................................................................................ 16
4.2 Hardware and Software Resets ........................................................................................ 17
4.2.1 Hardware Reset ..................................................................................................... 17
4.2.2 Software Reset....................................................................................................... 17
4.3 Analog to Digital Converter ............................................................................................... 19
4.3.1 Pin Connection ....................................................................................................... 19
4.3.2 ADC Characteristics ............................................................................................... 20
4.3.3 Sync. Signal Support.............................................................................................. 21
4.3.4 Clock Recovery ...................................................................................................... 22
4.3.5 Sampling Phase Adjustment .................................................................................. 23
4.4 Ultra-Reliable Digital Visual Receiver (DVI Rx)................................................................. 25
4.4.1 DVI Receiver Characteristics.................................................................................. 25
4.4.2 HDCP (High-Bandwidth Digital Content Protection System) .................................. 26
4.5 ITU-R BT656 Video Input ................................................................................................. 27
4.5.1 YCbCr Input Clamping ........................................................................................... 27
4.6 Image Capture – Active Window Decoder ........................................................................ 28
4.6.1 ADC Capture Window ............................................................................................ 28
4.6.2 DVI Capture Window .............................................................................................. 30
4.6.3 ITU-R BT656 Capture Window............................................................................... 30
4.7 Image Measurement......................................................................................................... 32
4.7.1 Input Format Measurement (IFM)........................................................................... 32
4.7.2 Input Data Measurement ........................................................................................ 34
4.8 Digital Color Controls........................................................................................................ 36
4.8.1 YUV Hue / Saturation Controls............................................................................... 36
4.8.2 RealColor Flesh tone Adjustment........................................................................... 37
4.8.3 RGB Black Level / Contrast / Brightness ................................................................ 37
4.8.4 Input Look-up Table ............................................................................................... 38
4.9 Horizontal Shrink .............................................................................................................. 39
4.10 Frame Store Interface..................................................................................................... 40
4.10.1 Supported SDRAM Devices ................................................................................. 40
4.10.2 Adjustable Frame Store Interface Delays ............................................................. 40
4.10.3 Frame Store Bandwidth Requirements ................................................................ 40
February 2002
v
C5020-DAT-01Q
5 Page Genesis Microchip
gm5020/gm5020-H Data Sheet
1.1 gm5020 System Design Example
Figure 1 below shows a typical dual interface LCD monitor system based on the gm5020.
Designs based on the gm5020 have reduced system cost and simplified hardware and firmware
design because only a minimal number of components are required in the system. The chip can
be used in a variety of systems, ranging from 'single-chassis' solutions for XGA and SXGA
monitors with frame store memory and video inputs. In addition, the gm5020 can be used in mid-
range SXGA monitors with no frame store memory.
DRDARMAM
DRAM
**Optional - For
FRC support only
Analog
RGB
Digital
DVI
EDID
PROM
gm5020
EDID
PROM
Video
(Y/C, Comp etc)
Video
Decoder
XTAL
**Optional - For
Video support only
PROM
MCU
+12V Power
+5V
+3.3V
+2.5v
**Optional - For Rom-
less MCU only
.
XTAL
Figure 1. gm5020 System Design Example
Panel
Interface
(24/48-bits)
Timing
Controller
Keypad
EEPROM
LCD ROW
Drivers
LCD Column
Drivers
February 2002
C5020-DAT-01Q
2
11 Page |
Páginas | Total 30 Páginas | |
PDF Descargar | [ Datasheet GM5020-H.PDF ] |
Número de pieza | Descripción | Fabricantes |
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