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PDF DS3882 Data sheet ( Hoja de datos )
| Número de pieza | DS3882 | |
| Descripción | Dual-Channel Automotive CCFL Controller | |
| Fabricantes | Maxim Integrated Products | |
| Logotipo |  |
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Rev 0; 3/06
Dual-Channel Automotive CCFL Controller
General Description
The DS3882 is a dual-channel cold-cathode fluorescent
lamp (CCFL) controller for automotive applications that
provides up to 300:1 dimming. It is ideal for driving
CCFLs used to backlight liquid crystal displays (LCDs)
in navigation and infotainment applications and for dri-
ving CCFLs used to backlight instrument clusters. The
DS3882 is also appropriate for use in marine and avia-
tion applications.
The DS3882 features EMI suppression functionality and
provides a lamp current overdrive mode for rapid lamp
heating in cold weather conditions. The DS3882 sup-
ports configurations of 1 or 2 lamps with fully indepen-
dent lamp control and minimal external components.
Multiple DS3882 controllers can be cascaded to sup-
port applications requiring more than 2 lamps. Control
of the DS3882, after initial programming setup, can be
completely achieved through I2C* software communi-
cation. Many DS3882 functions are also pin-controllable
if software control is not desired.
Applications
Automotive LCDs
Instrument Clusters
Marine and Aviation LCDs
Pin Configuration
TOP VIEW
FAULT 1
A0 2
SDA 3
SCL 4
LSYNC 5
LOSC 6
BRIGHT 7
PSYNC 8
POSC 9
A1 10
GND_S 11
SVML 12
SVMH 13
VCC 14
DS3882
TSSOP
28 OVD2
27 LCM2
26 GB2
25 GA2
24 VCC
23 PDN
22 LCO
21 GND
20 STEP
19 N.C.
18 OVD1
17 LCM1
16 GB1
15 GA1
Features
o Dual-Channel CCFL Controllers for Backlighting
LCD Panels and Instrument Clusters in
Automotive Navigation/Infotainment Applications
o Minimal External Components Required
o I2C Interface
o Per-Channel Lamp-Fault Monitoring for Lamp-
Open, Lamp-Overcurrent, Failure to Strike, and
Overvoltage Conditions
o Status Register Reports Fault Conditions
o Accurate (±5%) Independent On-Board Oscillators
for Lamp Frequency (40kHz to 100kHz) and DPWM
Burst-Dimming Frequency (22.5Hz to 440Hz)
o Lamp and DPWM Frequencies can be
Synchronized with External Sources to Reduce
Visual LCD Artifacts in Video Applications
o Optional Spread-Spectrum Lamp Clock Reduces
EMI
o Lamp Frequency can be Stepped Up or Down to
Move EMI Spurs Out of Band
o Lamp Current Overdrive Mode with Automatic
Turn-Off Quickly Warms Lamp in Cold
Temperatures
o Analog and Digital Brightness Control
o 300:1 Dimming Range Possible Using the Digital
Brightness Control Option
o Programmable Soft-Start Minimizes Audible
Transformer Noise
o On-Board Nonvolatile (NV) Memory Allows Device
Customization
o 8-Byte NV User Memory for Storage of Serial
Numbers and Date Codes
o Low-Power Standby Mode
o 4.75V to 5.25V Single-Supply Operation
o Temperature Range: -40°C to +105°C
o 28-Pin TSSOP Package
Ordering Information
PART
TEMP RANGE
DS3882E+
-40°C to +105°C
DS3882E+T&R -40°C to +105°C
+Denotes lead-free package.
PIN-PACKAGE
28 TSSOP (173 mils)
28 TSSOP (173 mils)
*Purchase of I2C components from Maxim Integrated Products, Inc., or one of its sublicensed Associated Companies, conveys a
license under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C
Standard Specification as defined by Philips.
Typical Operating Circuit appears at end of data sheet.
______________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1 page  
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Dual-Channel Automotive CCFL Controller
(VCC = 5.0V, TA = +25°C, unless otherwise noted.)
Typical Operating Characteristics
ACTIVE SUPPLY CURRENT
vs. SUPPLY VOLTAGE
8.0
7.5 DPWM = 100%
DPWM = 10%
DPWM = 50%
7.0
6.5
6.0
5.5
SVML< 2V
5.0
4.5
GATE QC = 3.5nC fLF:OSC = 64kHz
4.0
4.75 4.80 4.85 4.90 4.95 5.00 5.05 5.10 5.15 5.20 5.25
SUPPLY VOLTAGE (V)
ACTIVE SUPPLY CURRENT
vs. TEMPERATURE
7.5
7.3 VCC = 5.25V
7.1 VCC = 4.75V VCC = 5.0V
6.9
6.7
6.5
6.3
6.1
5.9
5.7
GATE QC = 3.5nC
5.5
-40.0
fLF:OSC = 64kHz
DPWM = 100%
32.5
TEMPERATURE (°C)
105
INTERNAL FREQUENCY CHANGE
vs. TEMPERATURE
1.0
0.8
0.6 DPWM FREQUENCY
0.4
0.2
0
-0.2
-0.4
-0.6 LAMP FREQUENCY
-0.8
-1.0
-40.0
32.5
TEMPERATURE (°C)
105
TYPICAL OPERATION AT 11V
TYPICAL OPERATION AT 13V
TYPICAL OPERATION AT 16V
10µs
5.0V GA
10µs
5.0V GB
10µs
2.00V LCM
10µs
2.00V OVD
10µs
5.0V GA
10µs
5.0V GB
10µs
2.00V LCM
10µs
2.00V OVD
10µs
5.0V GA
10µs
5.0V GB
10µs
2.00V LCM
10µs
2.00V OVD
TYPICAL STARTUP WITH SVM
BURST DIMMING AT 150Hz AND 10%
BURST DIMMING AT 150Hz AND 50%
2ms
5.0V SVML
2ms
5.0V GB
2ms
2.00V LCM
2ms
2.00V OVD
1ms
5.0V GA
1ms
5.0V GB
1ms
2.00V LCM
1ms
2.00V OVD
1ms
5.0V GA
1ms
5.0V GB
1ms
2.00V LCM
1ms
2.00V OVD
_____________________________________________________________________ 5
5 Page 
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Dual-Channel Automotive CCFL Controller
Shadowed EEPROM
The DS3882 incorporates SRAM-shadowed EEPROM
memory locations for all memory that needs to be
retained during power cycling. At power-up, SEEB (bit 7
of the BLC register) is low which causes the shadowed
locations to act as ordinary EEPROM. Setting SEEB
high disables the EEPROM write function and causes
the shadowed locations to function as ordinary SRAM
cells. This allows an infinite number of write cycles with-
out causing EEPROM damage and also eliminates the
EEPROM write time, tW from the write cycle. Because
memory changes made when SEEB is set high are not
written to EEPROM, these changes are not retained
through power cycles, and the power-up EEPROM values
are the last values written with SEEB low.
Channel Phasing
The lamp-frequency MOSFET gate turn-on times are
out of phase between the two channels during the burst
period. This reduces the inrush current that would
result from all lamps switching simultaneously, and
hence eases the design requirements for the DC sup-
ply. It is important to note that it is the lamp-frequency
signals that are phased, not the DPWM (burst) signals.
Lamp Dimming Control
The DS3882 provides two independent methods of
lamp dimming that can be combined to achieve a dim-
ming ratio of 300:1 or greater. The first method is
“burst” dimming, which uses a digital pulse-width-mod-
ulated (DPWM) signal (22.5Hz to 440Hz) to control the
lamp brightness. The second is “analog” dimming,
which is accomplished by adjusting the lamp current.
Burst dimming provides 128 linearly spaced brightness
steps. Analog dimming provides smaller substeps that
allow incremental brightness changes between burst
dimming steps. This ability is especially useful for low-
brightness dimming changes, where using burst dim-
ming alone would cause visible brightness step
changes. Analog dimming also allows the brightness to
be reduced below the minimum burst dimming level,
which provides for the maximum dimming range.
Burst dimming can be controlled using a user-supplied
analog voltage on the BRIGHT pin or through the I2C
interface. Analog dimming can only be controlled
through the I2C interface. Therefore, for applications that
require the complete dimming range and resolution capa-
bility of the DS3882, I2C dimming control must be used.
Burst Dimming
Burst dimming increases/decreases the brightness by
adjusting (i.e., modulating) the duty cycle of the DPWM
signal. During the high period of the DPWM cycle, the
lamps are driven at the selected lamp frequency
(40kHz to 100kHz) as shown in Figure 6. This part of
the cycle is called the “burst” period because of the
lamp frequency burst that occurs during this time.
During the low period of the DPWM cycle, the controller
disables the MOSFET gate drivers so the lamps are not
driven. This causes the current to stop flowing in the
lamps, but the time is short enough to keep the lamps
from de-ionizing.
The DS3882 can generate its own DPWM signal inter-
nally (set DPSS = 0 in CR1), which can then be
sourced to other DS3882s if required, or the DPWM sig-
nal can be supplied from an external source (set DPSS
= 1 in CR1). To generate the DPWM signal internally,
the DS3882 requires a clock (referred to as the dim-
ming clock) to set the DPWM frequency. The user can
supply the dimming clock by setting POSCS = 1 in CR1
and applying an external 22.5Hz to 440Hz signal at the
POSC pin, or the dimming clock can be generated by
the DS3882’s internal oscillator (set POSCS = 0 in
CR1), in which case the frequency is set by an external
resistor at the POSC pin. These two dimming clock
options are shown in Figure 3. Regardless of whether
the dimming clock is generated internally or sourced
externally, the POSC0 and POSC1 bits in CR2 must be
set to match the desired dimming clock frequency.
The internally generated DPWM signal can be provided
at the PSYNC I/O pin (set RGSO = 0 in CR1) for sourc-
ing to other DS3882s, if any, in the circuit. This allows
all DS3882s in the system to be synchronized to the
same DPWM signal. A DS3882 that is generating the
DPWM signal for other DS3882s in the system is
referred to as the DPWM source. When bringing in an
externally generated DPWM signal, either from another
DS3882 acting as a DPWM source or from some other
user-provided source, it is input into the PSYNC I/O pin
of the DS3882, and the receiving DS3882 is referred to
a DPWM receiver. In this mode, the BRIGHT and POSC
inputs are disabled and should be grounded (see
Figure 5).
When the DPWM signal is generated internally, its duty
cycle (and, thus, the lamp brightness) is controlled
either by a user-supplied analog voltage at the BRIGHT
input or through the I2C interface by varying the 7-bit
PWM code in the BPWM register. When using the
BRIGHT pin to control burst dimming, a voltage of less
than 0.5V causes the DS3882 to operate with the mini-
mum burst duty cycle, providing the lowest brightness
setting, while any voltage greater than 2.0V causes a
100% burst duty cycle (i.e., lamps always being dri-
ven), which provides the maximum brightness. For
voltages between 0.5V and 2V, the duty cycle varies
linearly between the minimum and 100%. Writing a
____________________________________________________________________ 11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet DS3882.PDF ] | |
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