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PDF MAX3421E Data sheet ( Hoja de datos )
| Número de pieza | MAX3421E | |
| Descripción | USB Peripheral/Host Controller | |
| Fabricantes | Maxim Integrated Products | |
| Logotipo |  |
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EVALUATION KIT AVAILABLE
MAX3421E
USB Peripheral/Host Controller
with SPI Interface
General Description
The MAX3421E USB peripheral/host controller contains
the digital logic and analog circuitry necessary to
implement a full-speed USB peripheral or a full-/low-
speed host compliant to USB specification rev 2.0. A
built-in transceiver features ±15kV ESD protection and
programmable USB connect and disconnect. An inter-
nal serial interface engine (SIE) handles low-level USB
protocol details such as error checking and bus retries.
The MAX3421E operates using a register set accessed
by an SPI interface that operates up to 26MHz. Any SPI
master (microprocessor, ASIC, DSP, etc.) can add USB
peripheral or host functionality using the simple 3- or 4-
wire SPI interface.
The MAX3421E makes the vast collection of USB
peripherals available to any microprocessor, ASIC, or
DSP when it operates as a USB host. For point-to-point
solutions, for example, a USB keyboard or mouse inter-
faced to an embedded system, the firmware that oper-
ates the MAX3421E can be simple since only a
targeted device is supported.
Internal level translators allow the SPI interface to run at
a system voltage between 1.4V and 3.6V. USB-timed
operations are done inside the MAX3421E with inter-
rupts provided at completion so an SPI master does not
need timers to meet USB timing requirements. The
MAX3421E includes eight general-purpose inputs and
outputs so any microprocessor that uses I/O pins to
implement the SPI interface can reclaim the I/O pins
and gain additional ones.
The MAX3421E operates over the extended -40°C to
+85°C temperature range and is available in a 32-pin
TQFP package (5mm x 5mm) and a 32-pin TQFN pack-
age (5mm x 5mm).
Applications
Embedded Systems
Medical Devices
Microprocessors and
DSPs
Custom USB Devices
Cameras
Desktop Routers
PLCs
Set-Top Boxes
PDAs
MP3 Players
Instrumentation
Features
o Microprocessor-Independent USB Solution
o Software Compatible with the MAX3420E USB
Peripheral Controller with SPI Interface
o Complies with USB Specification Revision 2.0
(Full-Speed 12Mbps Peripheral, Full-/Low-Speed
12Mbps/1.5Mbps Host)
o Integrated USB Transceiver
o Firmware/Hardware Control of an Internal D+
Pullup Resistor (Peripheral Mode) and D+/D-
Pulldown Resistors (Host Mode)
o Programmable 3- or 4-Wire, 26MHz SPI Interface
o Level Translators and VL Input Allow Independent
System Interface Voltage
o Internal Comparator Detects VBUS for Self-
Powered Peripheral Applications
o ESD Protection on D+, D-, and VBCOMP
o Interrupt Output Pin (Level- or Programmable-
Edge) Allows Polled or Interrupt-Driven SPI
Interface
o Eight General-Purpose Inputs and Eight General-
Purpose Outputs
o Interrupt Signal for General-Purpose Input Pins,
Programmable Edge Polarity
o Intelligent USB SIE
o Automatically Handles USB Flow Control and
Double Buffering
o Handles Low-Level USB Signaling Details
o Contains Timers for USB Time-Sensitive
Operations so SPI Master Does Not Need to Time
Events
o Space-Saving Lead-Free TQFP and TQFN
Packages (5mm x 5mm)
Ordering Information
PART
TEMP RANGE PIN-
PACKAGE
TOP
MARK
MAX3421EEHJ+ -40°C to +85°C 32 TQFP
—
MAX3421EETJ+ -40°C to +85°C 32 TQFN-EP*
BTBG
*EP = Exposed pad.
+Denotes a lead(Pb)-free/RoHS-compliant package.
For pricing, delivery, and ordering information, please contact Maxim Direct
at 1-888-629-4642, or visit Maxim’s website at www.maximintegrated.com.
19-3953; Rev 4; 7/13
1 page  
MAX3421E
USB Peripheral/Host Controller
with SPI Interface
PIN
1
2
3, 19
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
20
Pin Description
NAME
GPIN7
VL
GND
GPOUT0
GPOUT1
GPOUT2
GPOUT3
GPOUT4
GPOUT5
GPOUT6
GPOUT7
RES
SCLK
SS
INPUT/
OUTPUT
FUNCTION
Input General-Purpose Input. GPIN7–GPIN0 are connected to VL with internal pullup resistors.
GPIN7–GPIN0 logic levels are referenced to the voltage on VL.
Input
Input
Level-Translator Voltage Input. Connect VL to the system’s 1.4V to 3.6V logic-level power
supply. Bypass VL to ground with a 0.1µF capacitor as close to VL as possible.
Ground
Output
General-Purpose Push-Pull Outputs. GPOUT7–GPOUT0 logic levels are referenced to the
voltage on VL.
Input
Input
Input
Device Reset. Drive RES low to clear all of the internal registers except for PINCTL (R17),
USBCTL (R15), and SPI logic. The logic level is referenced to the voltage on VL. (See the
Device Reset section for a description of resets available on the MAX3421E.) Note: The
MAX3421E is internally reset if either VCC or VL is not present. The register file is not accessible
under these conditions.
SPI Serial-Clock Input. An external SPI master supplies SCLK with frequencies up to 26MHz. The
logic level is referenced to the voltage on VL. Data is clocked into the SPI slave interface on the
rising edge of SCLK. Data is clocked out of the SPI slave interface on the falling edge of SCLK.
SPI Slave Select Input. The SS logic level is referenced to the voltage on VL. When SS is driven
high, the SPI slave interface is not selected, the MISO pin is high impedance, and SCLK
transitions are ignored. An SPI transfer begins with a high-to-low SS transition and ends with a
low-to-high SS transition.
MISO
MOSI
GPX
INT
D-
Output
Input or
Input/
Output
Output
Output
Input/
Output
SPI Serial-Data Output (Master-In Slave-Out). MISO is a push-pull output. MISO is tri-stated in
half-duplex mode or when SS = 1. The MISO logic level is referenced to the voltage on VL.
SPI Serial-Data Input (Master-Out Slave-In). The logic level on MOSI is referenced to the
voltage on VL. MOSI can also be configured as a bidirectional MOSI/MISO input and output.
(See Figure 15.)
General-Purpose Multiplexed Push-Pull Output. The internal MAX3421E signal that appears on
GPX is programmable by writing to the GPXB and GPXA bits of the PINCTL (R17) register and the
SEPIRQ bit of the MODE (R27) register. GPX indicates one of five signals (see the GPX section).
Interrupt Output. In edge mode, the logic level on INT is referenced to the voltage on VL and is
a push-pull output with programmable polarity. In level mode, INT is open-drain and active low.
Set the IE bit in the CPUCTL (R16) register to enable INT.
USB D- Signal. Connect D- to a USB connector through a 33Ω ±1% series resistor. A
switchable 15kΩ D- pulldown resistor is internal to the device.
Maxim Integrated
5
5 Page 
MAX3421E
USB Peripheral/Host Controller
with SPI Interface
ABSOLUTE MAXIMUM RATINGS
(All voltages referenced to GND, unless otherwise noted.)
VCC ......................................................................... -0.3V to +4V
VL .............................................................................-0.3V to +4V
VBCOMP .................................................................-0.3V to +6V
D+, D-, XI, XO ............................................-0.3V to (VCC + 0.3V)
SCLK, MOSI, MISO, SS, RES, GPOUT7–GPOUT0,
GPIN7–GPIN0, GPX, INT ..........................-0.3V to (VL + 0.3V)
Continuous Power Dissipation (TA = +70°C)
32-Pin TQFN (derate 21.3mW/°C above +70°C) .......1702mW
32-Pin TQFP (derate 13.1mW/°C above +70°C)........1047mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow) .......................................+260°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VCC = +3V to +3.6V, VL = +1.4V to +3.6V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = +3.3V, VL =
+2.5V, TA = +25°C.) (Note 3)
PARAMETER
DC CHARACTERISTICS
Supply Voltage VCC
Logic-Interface Voltage VL
SYMBOL
VCC
VL
CONDITIONS
MIN TYP MAX UNITS
3.0 3.3 3.6
1.4 3.6
V
V
VCC Supply Current
Continuously transmitting on D+ and D- at
ICC 12Mbps, CL = 50pF on D+ and D- to GND,
CONNECT = 0
45 mA
VL Supply Current
IL
SCLK toggling at 20MHz, SS = low,
GPIN7–GPIN0 = 0
2.35 10
mA
VCC Supply Current During Idle
VCC Suspend Supply Current
VL Suspend Supply Current
LOGIC-SIDE I/O
MISO, GPOUT7–GPOUT0, GPX,
INT Output High Voltage
MISO, GPOUT7–GPOUT0, GPX,
INT Output Low Voltage
SCLK, MOSI, GPIN7–GPIN0, SS,
RES Input High Voltage
ICCID
ICCSUS
ILSUS
D+ = high, D- = low
CONNECT = 0, PWRDOWN = 1
CONNECT = 0, PWRDOWN = 1
VOH
VOL
VIH
ILOAD = +1mA
ILOAD = +5mA, VL < 2.5V (Note 4)
ILOAD = +10mA, VL ≥ 2.5V (Note 4)
ILOAD = -1mA
ILOAD = -20mA, VL < 2.5V (Note 4)
ILOAD = -20mA, VL ≥ 2.5V (Note 4)
8.7 15 mA
30 60 µA
20 50 µA
VL - 0.4
VL - 0.45
VL - 0.4
2/3 x VL
V
0.4
0.6 V
0.4
V
SCLK, MOSI, GPIN7–GPIN0, SS,
RES Input Low Voltage
VIL
0.4 V
SCLK, MOSI, SS, RES Input
Leakage Current
GPIN7–GPIN0 Pullup Resistor to VL
TRANSCEIVER SPECIFICATIONS
IIL
RGPIN
-1 +1 µA
10 20 30 kΩ
Differential-Receiver Input
Sensitivity
|VD+ - VD-|
0.2 V
Maxim Integrated
11
11 Page | ||
| Páginas | Total 28 Páginas | |
| PDF Descargar | [ Datasheet MAX3421E.PDF ] | |
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