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Agilent - High Speed LVTTL Compatible 3.3 Volt Optocouplers

Numéro de référence HCPL063L
Description High Speed LVTTL Compatible 3.3 Volt Optocouplers
Fabricant Agilent 
Logo Agilent 





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HCPL063L fiche technique
Agilent HCPL-260L/ 060L/263L/063L
High Speed LVTTL Compatible
3.3 Volt Optocouplers
Data Sheet
Description
The HCPL-260L/060L/263L/063L
are optically coupled gates that
combine a GaAsP light emitting
diode and an integrated high gain
photo detector. An enable input
allows the detector to be strobed.
The output of the detector IC is an
open collector Schottky-clamped
transistor. The internal shield
provides a guaranteed common
mode transient immunity
specification of 15 kV/ µs.
This unique design provides
maximum AC and DC circuit
isolation while achieving
LVTTL/LVCMOS compatibility.
The optocoupler AC and DC
operational parameters are
guaranteed from –40˚C to +85˚C
allowing trouble-free system
performance.
Functional Diagram
HCPL-260L/060L
NC 1
8 VCC
ANODE 2
7 VE
CATHODE 3
6 VO
NC 4
SHIELD
5 GND
HCPL-263L/063L
ANODE 1 1
8 VCC
CATHODE 1 2
7 VO1
CATHODE 2 3
6 VO2
ANODE 2 4
5 GND
SHIELD
TRUTH TABLE
(POSITIVE LOGIC)
LED
ON
OFF
ON
OFF
ON
OFF
ENABLE
H
H
L
L
NC
NC
OUTPUT
L
H
H
H
L
H
TRUTH TABLE
(POSITIVE LOGIC)
LED
ON
OFF
OUTPUT
L
H
Features
• Low power consumption
• 15 kV/µs minimum Common Mode
Rejection (CMR) at VCM = 50 V
• High speed: 15 MBd typical
• LVTTL/LVCMOS compatible
• Low input current capability:
5 mA
• Guaranteed AC and DC performance
over temperature: –40˚C to +85˚C
• Available in 8-pin DIP, SOIC-8
• Strobable output (single channel
products only)
• Safety approvals; UL, CSA, VDE
(pending)
Applications
• Isolated line receiver
• Computer-peripheral interfaces
• Microprocessor system interfaces
• Digital isolation for A/D, D/A
conversion
• Switching power supply
• Instrument input/output isolation
• Ground loop elimination
• Pulse transformer replacement
• Field buses
A 0.1 µF bypass capacitor must be connected between pins 5 and 8.
CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to prevent
damage and/or degradation which may be induced by ESD.

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