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Exar Corporation - INTELLIGENT DYNAMIC CLOCK SWITCH PLL CLOCK DRIVER

Numéro de référence XRK7933
Description INTELLIGENT DYNAMIC CLOCK SWITCH PLL CLOCK DRIVER
Fabricant Exar Corporation 
Logo Exar Corporation 





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XRK7933 fiche technique
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PRELIMINARY
XRK7933
INTELLIGENT DYNAMIC CLOCK SWITCH PLL CLOCK DRIVER
MARCH 2005
GENERAL DESCRIPTION
The XRK7933 is a PLL clock driver designed
specifically for redundant clock tree designs. The
device receives two differential LVPECL clock signals
from which it generates 5 new differential LVPECL
clock outputs. Two of the output pairs regenerate the
input signals frequency and phase while the other
three pairs generate 3x, phase aligned clock outputs.
External PLL feedback is used to also provide zero
delay buffer performance.
The XRK7933 Intelligent Dynamic Clock Switch
circuit continuously monitors both input CLK signals.
Upon detection of a failure (CLK stuck HIGH or LOW
for at least 1 period), the INP_BAD for that CLK will
REV. P1.0.1
be latched (H). If that CLK is the primary clock, the
device will switch to the good secondary clock and
phase/frequency alignment will occur with minimal
output phase disturbance. The typical phase bump
caused by a failed clock is eliminated.
FEATURES
Fully Integrated PLL
Intelligent Dynamic Clock Switch
LVPECL Clock Outputs
LVCMOS Control I/O
3.3V Operation
32-Lead LQFP Packaging
FIGURE 1. BLOCK DIAGRAM OF THE XRK7933
CLK_Selected
INP1Bad
INP0Bad
Man_Override
Alarm_Reset
Sel_CLK
CLK0
CLK0
CLK1
CLK1
Ext_FB
Ext_FB
MR
Dynamic
Switch
Logic
OR
PLL
200-400MHz
÷4
÷12
PLL_En
Qb0
Qb0
Qb1
Qb1
Qb2
Qb2
Qa0
Qa0
Qa1
Qa1
Exar Corporation 48720 Kato Road, Fremont CA, 94538 (510) 668-7000 FAX (510) 668-7017 www.exar.com

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