PDF XR17C152 Data sheet ( Hoja de datos )

Número de pieza	XR17C152
Descripción	5V PCI BUS DUAL UART
Fabricantes	Exar Corporation
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No Preview Available ! áçwww.DataSheet4U.com JUNE 2004 GENERAL DESCRIPTION The XR17C1521 (152) is a monolithic dual PCI Bus Universal Asynchronous Receiver and Transmitter (UART) in Exar’s PCI Bus UART family. The device is designed to meet today’s 32-bit PCI Bus and high bandwidth requirement in communication systems. The global interrupt source register provides a com- plete interrupt status indication for both channels to speed up interrupt parsing. Each UART is indepen- dently controlled and has its own 16C550 compatible 5G (Fifth Generation) register set, transmit and re- ceive FIFOs of 64 bytes, fully programmable transmit and receive FIFO trigger levels, transmit and receive FIFO level counters, automatic hardware flow control with programmable hysteresis, automatic software (Xon/Xoff) flow control, automatic half-duplex control output, wireless IrDA (Infrared Data Association) in- frared encoder/decoder, 8 multi-purpose definable in- puts/outputs, and a 16-bit general purpose timer/ counter. NOTE: 1 Covered by U.S. Patents #5,649,122, #5,949,787 APPLICATIONS • Network Management • Factory Automation and Process Control • Ethernet Network to Serial Ports • Point-of-Sale Systems • Remote Access Servers • Multi serial ports RS-232/RS-422/RS-485 Cards XR17C152 5V PCI BUS DUAL UART FEATURES REV. 1.2.0 • High Performance Dual PCI UART • PCI Bus 2.2 Target Interface Compliance • 5V PCI Bus Compliant up to 33MHz Clock • 32-bit PCI Bus Interface with EEPROM Interface • A Global Interrupt Source Register for both UARTs • Data Transfer in Byte, Word and Double-word • Data Read/Write Burst Operation • Each UART is independently controlled with: •16C550 Compatible 5G Register Set •64-byte Transmit and Receive FIFOs •Transmit and Receive FIFO Level Counters •Automatic RTS/CTS or DTR/DSR Flow Control •Automatic Xon/Xoff Software Flow Control •Automatic RS485 Half-duplex Control Output with 16 Selectable Turn-around Delay •Infrared (IrDA 1.0) Data Encoder/Decoder •Programmable Data Rate with Prescaler •Up to 6.25 Mbps Serial Data Rate at 5V and 8X Sampling • Eight Multi-Purpose Inputs/outputs • A General Purpose 16-bit Timer/Counter • Sleep Mode with Automatic Wake-up Indicator • Same package and pinout as the XR17D152 (14x14x1.0mm TQFP package) FIGURE 1. BLOCK DIAGRAM CLK RST# AD[31:0] C/BE[3:0]# FRAME# IRDY# TRDY# DEVSEL# STOP# INTA# IDSEL PERR# SERR# PAR EECK EEDI EEDO EECS ENIR EN485# PCI Local Bus Interface Device Configuration Registers Configuration Space Registers EEPROM Interface 16-bit Timer/Counter UART Channel 0 UART Regs BRG 64 Byte TX FIFO TX & RX IR ENDEC 64 Byte RX FIFO UART Channel 1 UART Regs BRG 64 Byte TX FIFO TX & RX IR ENDEC 64 Byte RX FIFO 5V VCC GND TX0, RX0, DTR0#, DSR0#, RTS0#, CTS0#, CD0#, RI0# TX1, RX1, DTR1#, DSR1#, RTS1#, CTS1#, CD1#, RI1# Multi-pur.pose Inputs/Outputs Crystal Osc/Buffer MPIO0- MPIO7 XTAL1 XTAL2 TMRCK Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510) 668-7000 • FAX (510) 668-7017 • www.exar.com 1 page áç REV. 1.2.0 Pin Description XR17C152 5V PCI BUS DUAL UART NAME TEST# VCC GND NC PIN # TYPE DESCRIPTION 79 10, 22, 32, 43, 54, 80, 89, 100 1, 11, 23, 33, 44, 53, 78, 88 63, 64 I PWR PWR Factory Test. Connect to VCC for normal operation. +5V (PCI Compliance). See the electrical characteristics for details. Power supply common, ground. No Connection. NOTE: Pin type: I=Input, O=Output, I/O= Input/output, OD=Output Open Drain. 5 5 Page áç REV. 1.2.0 XR17C152 5V PCI BUS DUAL UART TABLE 3: DEVICE CONFIGURATION REGISTERS SHOWN IN BYTE ALIGNMENT ADDRESS [A7:A0] REGISTER READ/WRITE COMMENT RESET STATE Ox08A Ox08B RESET SLEEP Write-only Self clear bits after executing Reset [1:0] Read/Write Sleep mode [1:0] Bits 7-0 = 0x00 Bits 7-0 = 0x00 Ox08C Ox08D Ox08E Ox08F DREV DVID REGB MPIOINT Read-only Device revision Read-only Device identification Read/Write Read/Write MPIO interrupt mask Bits 7-0 = 0x02 Bits 7-0 = 0x22 Bits 7-0 = 0x00 Bits 7-0 = 0x00 Ox090 Ox091 Ox092 Ox093 MPIOLVL MPIO3T MPIOINV MPIOSEL Read/Write MPIO level control Read/Write MPIO output control Read/Write MPIO input polarity select Read/Write MPIO select Bits 7-0 = 0x00 Bits 7-0 = 0x00 Bits 7-0 = 0x00 Bits 7-0 = 0xFF ADDRESS 0x080-083 0x084-087 0x088-08B 0x08C-08F 0x090-093 TABLE 4: DEVICE CONFIGURATION REGISTERS SHOWN IN DWORD ALIGNMENT REGISTER BYTE 3 [31:24] BYTE 2 [23:16] BYTE 1 [15:8] INTERRUPT (read-only) INT3 INT2 INT1 TIMER (read/write) TIMERMSB TIMERLSB TIMER (reserved) ANCILLARY1 (read/write) SLEEP RESET REGA (reserved) ANCILLARY2 (read-only) MPIOINT REGB DVID MPIO (read/write) MPIOSEL MPIOINV MPIO3T BYTE 0 [7:0] INT0 TIMERCNTL 8XMODE DREV MPIOLVL 11 11 Page

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