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PDF MAX3640 Data sheet ( Hoja de datos )
| Número de pieza | MAX3640 | |
| Descripción | Dual 4:2 Crosspoint Switch | |
| Fabricantes | Maxim Integrated Products | |
| Logotipo |  |
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19-4800; Rev 0; 3/00
3.3V, 622Mbps LVDS,
Dual 4:2 Crosspoint Switch
General Description
The MAX3640 is a dual-path crosspoint switch for use
at OC-12 data rates. The MAX3640 can be used to
receive and transmit 622Mbps low-voltage differential
signals (LVDS) across a backplane with minimum jitter
accumulation. Each path incorporates input buffers,
multiplexers, a crosspoint switch, and output drivers.
The four output channels have a redundant set of out-
puts for test or fanning purposes. The device offers sig-
nal-path redundancy for critical data streams.
The MAX3640 has a unique power-saving feature.
When a set of four output channels has been de-select-
ed, the output drivers are powered down to reduce
power consumption by 165mW. The fully differential
architecture ensures low crosstalk, jitter accumulation,
and signal skew.
The MAX3640 is available in a 48-pin TQFP package
and operates from a +3.3V supply over the 0°C to
+85°C temperature range.
Features
o Single +3.3V Supply
o 257mW Power Consumption (four output
channels enabled)
o 2.8psRMS Output Random Jitter
o 42ps Output Deterministic Jitter
o Power-Down Feature for Deselected Outputs
o 110ps Channel-to-Channel Skew
o 240ps Output Edge Speed
o LVDS Inputs/Outputs
o LVDS Output 3-State Enable
SONET/SDH Backplanes
High-Speed Parallel Links
Digital Cross-Connects
System Interconnects
ATM Switch Cores
Applications
PART
MAX3640UCM
Ordering Information
TEMP. RANGE
0°C to +85°C
PIN-PACKAGE
48 TQFP
Pin Configuration appears at end of data sheet.
MAX3869
LASER DRIVER
OPTICAL
TRANSCEIVER
MAX3866
TIA AND LA
Typical Operating Circuit
2.5Gbps
MAX3876
CDR
MAX3831
4-CHANNEL
INTERCONNECT
MUX/DEMUX
622Mbps
MAX3640
CROSSPOINT
SWITCH
PARALLEL DATA
OUTPUT
SONET
SOURCE A
622Mbps
SONET
SOURCE B
________________________________________________________________ Maxim Integrated Products 1
For free samples and the latest literature, visit www.maxim-ic.com or phone 1-800-998-8800.
For small orders, phone 1-800-835-8769.
1 page  
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3.3V, 622Mbps LVDS,
Dual 4:2 Crosspoint Switch
Pin Description
PIN
1, 12, 25, 36,
41
2, 11, 26, 35
3, 5, 45, 47
4, 6, 46, 48
7, 9, 13, 15
8, 10, 14, 16
17–20
21, 23, 27, 29
22, 24, 28, 30
31, 33, 37, 39
32, 34, 38, 40
42
43
44
NAME
VCC
GND
DIA3+, DIA4+, DIA1+,
DIA2+
DIA3-, DIA4-, DIA1-,
DIA2-
DIB1+, DIB2+, DIB3+,
DIB4+
DIB1-, DIB2-, DIB3-,
DIB4-
SEL1–SEL4
DOB4-, DOB3-, DOB2-,
DOB1-
DOB4+, DOB3+,
DOB2+, DOB1+
DOA4-, DOA3-, DOA2-,
DOA1-
DOA4+, DOA3+,
DOA2+, DOA1+
ENB
ENA
IN_SEL
FUNCTION
Positive Supply Voltage
Supply Ground
Positive LVDS, Channel-A Data Input
Negative LVDS, Channel-A Data Input
Positive LVDS, Channel-B Data Input
Negative LVDS, Channel-B Data Input
Crosspoint Switch Select, TTL Input. (Table 1)
Negative LVDS, Channel-B Data Output
Positive LVDS, Channel-B Data Output
Negative LVDS, Channel-A Data Output
Positive LVDS, Channel-A Data Output
Channel-B Output Enable, TTL Input. ENB = high enables DOB1−DOB4.
ENB = low powers down DOB1−DOB4 and sets them to a high-impedance state.
Channel-A Output Enable, TTL Input. ENA = high enables DOA1−DOA4.
ENA = low powers down DOA1−DOA4 and sets them to a high-impedance state.
Input Select Pin, TTL Input. Connect to logic high (or VCC) to select DIA1−DIA4.
Connect to logic low (or GND) to select DIB1−DIB4.
Detailed Description
Figure 2 shows the MAX3640’s architecture. It consists
of two data paths; each data path begins with four dif-
ferential input buffers. The IN_SEL pin selects whether
the A or B channels are passed to the 2x2 crosspoint
switch that follows. The SEL_ pins control the routing of
the crosspoint switch. Each crosspoint switch output
drives a pair of LVDS output drivers. This provides a
redundant set of outputs that can be used for fan-out
or test purposes. Each set of outputs, DOA_ and
DOB_, is enabled or disabled by the ENA and ENB
pins. See Table 1 for routing controls.
LVDS Inputs and Outputs
The MAX3640 features LVDS inputs and outputs for
interfacing with high-speed digital circuitry. The LVDS
standard is based on the IEEE 1596.3 LVDS specifica-
tion. This technology uses 500mV to 800mV differential
low-voltage swings to achieve fast transition times, low
power dissipation, and improved noise immunity.
For proper operation, the data outputs require 100Ω dif-
ferential termination between the inverting and nonin-
verting pins. Do not terminate these outputs to ground.
See Figure 1 for LVDS output voltage specifications.
The data inputs are internally terminated with 100Ω dif-
ferential and therefore do not require external termina-
tion.
_______________________________________________________________________________________ 5
5 Page 
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3.3V, 622Mbps LVDS,
Dual 4:2 Crosspoint Switch
NOTES
______________________________________________________________________________________ 11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet MAX3640.PDF ] | |
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