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Eorex - Synchronous DRAM

Numéro de référence EM482M3244VBA
Description Synchronous DRAM
Fabricant Eorex 
Logo Eorex 





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EM488M3244VBA
256Mb (2M×4Bank×32) Synchronous DRAM
Features
Fully Synchronous to Positive Clock Edge
Single 3.3V ±0.3V Power Supply
LVTTL Compatible with Multiplexed Address
Programmable Burst Length (B/L) - 1, 2, 4, 8
or Full Page
Programmable CAS Latency (C/L) - 2 or 3
Data Mask (DQM) for Read / Write Masking
Programmable Wrap Sequence
Sequential (B/L = 1/2/4/8/full Page)
Interleave (B/L = 1/2/4/8)
Burst Read with Single-bit Write Operation
All Inputs are Sampled at the Rising Edge of
the System Clock
Auto Refresh and Self Refresh
4,096 Refresh Cycles / 64ms (15.625us)
Description
The EM488M3244VBA is Synchronous Dynamic
Random Access Memory (SDRAM) organized as
2Meg words x 4 banks by 32 bits. All inputs and
outputs are synchronized with the positive edge of
the clock.
The 256Mb SDRAM uses synchronized pipelined
architecture to achieve high speed data transfer
rates and is designed to operate at 3.3V low power
memory system. It also provides auto refresh with
power saving / down mode. All inputs and outputs
voltage levels are compatible with LVTTL.
Available packages: TFBGA-90B(13mmx8mm).
Ordering Information
Part No
Organization Max. Freq
EM488M3244VBA-75F
8M X 32
133MHz @CL3
Package
Grade Pb
TFBGA -90B Commercial Free
* EOREX reserves the right to change products or specification without notice.
Jul. 2006
www.eorex.com
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