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PDF L6562A Data sheet ( Hoja de datos )
| Número de pieza | L6562A | |
| Descripción | Transition-mode PFC controller | |
| Fabricantes | STMicroelectronics | |
| Logotipo |  |
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L6562A
Features
■ Proprietary multiplier design for minimum thd
■ Very accurate adjustable output overvoltage
protection
■ Ultra-low (30µA) Start-up current
■ Low (2.5mA) quiescent current
■ Digital leading-edge blanking on current sense
■ Disable function on E/A input
■ 1.4% (@ TJ = 25 °C) internal reference voltage
■ -600/+800mA totem pole gate driver with active
pull-down during UVLO and voltage clamp
■ DIP-8/SO-8 packages
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Figure 1. Block diagram
Transition-mode PFC controller
Preliminary Data
DIP-8
SO-8
Applications
PFC pre-regulators for:
■ IEC61000-3-2 compliant SMPS (Flat TV,
desktop PC, games)
■ HI-END AC-DC adapter/charger up to 400W
■ Electronic ballast
■ Entry level server & web server
March 2007
Rev 1
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to
change without notice.
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1 page  
L6562A
3 Maximum ratings
Maximum ratings
Table 2. Absolute maximum ratings
Symbol
Pin
Parameter
VCC 8 IC supply voltage (ICC ≤ 20mA)
IGD 7 Output totem pole peak current
--- 1 to 4 Analog inputs & outputs
IZCD 5 Zero current detector max. current
Value
Self-limited
Self-limited
-0.3 to 8
±10
Unit
V
A
V
mA
4 Thermal data
Table 3. Thermal data
Symbol
Parameter
RthJA
PTOT
TJ
TSTG
Max. Thermal Resistance, Junction-to-
ambient
Power Dissipation @TA = 50°C
Junction Temperature Operating range
Storage Temperature
SO8
150
Value
DIP8
100
0.65 1
-40 to 150
-55 to 150
Unit
°C/W
W
°C
°C
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5 Page 
L6562A
Application information
Figure 3. THD optimization: standard TM PFC controller (left side) and L6562A
(right side)
Input current
Input current
Rectified mains voltage
IInmpauitncsurrent
MOSFET's drainVvdorlatainge
Rectified mains voltage
IInmpauitncsurrent
MOSFET's drainVvdorlatainge
To overcome this issue the circuit embedded in the device forces the PFC pre-regulator to
process more energy near the line voltage zero-crossings as compared to that commanded
by the control loop. This will result in both minimizing the time interval where energy transfer
is lacking and fully discharging the high-frequency filter capacitor after the bridge. The effect
of the circuit is shown in figure 2, where the key waveforms of a standard TM PFC controller
are compared to those of the L6562A.
Essentially, the circuit artificially increases the ON-time of the power switch with a positive
offset added to the output of the multiplier in the proximity of the line voltage zero-crossings.
This offset is reduced as the instantaneous line voltage increases, so that it becomes
negligible as the line voltage moves toward the top of the sinusoid.
To maximally benefit from the THD optimizer circuit, the high-frequency filter capacitor after
the bridge rectifier should be minimized, compatibly with EMI filtering needs. A large
capacitance, in fact, introduces a conduction dead-angle of the AC input current in itself -
even with an ideal energy transfer by the PFC pre-regulator - thus making the action of the
optimizer circuit little effective.
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| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet L6562A.PDF ] | |
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