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PDF ADG1413 Data sheet ( Hoja de datos )
| Número de pieza | ADG1413 | |
| Descripción | (ADG1411 - ADG1413) Quad SPST Switch | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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2Ω Max On Resistance,
±15 V/12 V/±5 V iCMOS™ Quad SPST Switch
Preliminary Technical Data
ADG1411/ADG1412/ADG1413
FEATURES
2Ω Max On Resistance
0.5Ω Max On Resistance Flatness
200mA continuous current per channel
33 V supply range
Fully specified at +12 V, ±15 V, ±5 V
No VL supply required
3 V logic-compatible inputs
Rail-to-rail operation
16-lead TSSOP and 16-lead LFCSP
Typical power consumption: <0.03 µW
APPLICATIONS
Automatic test equipment
Data aquisition systems
Battery-powered systems
Sample-and-hold systems
Audio signal routing
Video signal routing
Communication systems
Relay Replacement
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GENERAL DESCRIPTION
The ADG1411/ADG1412/ADG1413 are monolithic
complementary metal-oxide semiconductor (CMOS) devices
containing four independently selectable switches designed on
an iCMOS process. iCMOS (industrial CMOS) is a modular
manufacturing process combining high voltage CMOS and
bipolar technologies. It enables the development of a wide range
of high performance analog ICs capable of 33 V operation in a
footprint that no previous generation of high voltage parts has
been able to achieve. Unlike analog ICs using conventional
CMOS processes, iCMOS components can tolerate high supply
voltages while providing increased performance, dramatically
lower power consumption, and reduced package size.
The on resistance profile is very flat over the full analog input
range ensuring excellent linearity and low distortion when
switching audio signals.
FUNCTIONAL BLOCK DIAGRAM
IN1
IN2
ADG1411
IN3
IN4
S1
D1
S2
D2
S3
D3
S4
D4
S1 S1
IN1 IN1
D1 D1
S2 S2
IN2 IN2
ADG1412
D2
S3
D2
ADG1413
S3
IN3 IN3
D3 D3
S4 S4
IN4 IN4
D4 D4
SWITCHES SHOWN FOR A LOGIC "1" INPUT
Figure 1.
iCMOS construction ensures ultralow power dissipation,
making the parts ideally suited for portable and battery-
powered instruments.
The ADG1411/ADG1412/ADG1413 contain four independent
single-pole/single-throw (SPST) switches. The ADG1411 and
ADG1412 differ only in that the digital control logic is inverted.
The ADG1411 switches are turned on with Logic 0 on the
appropriate control input, while Logic 1 is required for the
ADG1412. The ADG1413 has two switches with digital control
logic similar to that of the ADG1411; the logic is inverted on
the other two switches. Each switch conducts equally well in
both directions when on and has an input signal range that
extends to the supplies. In the off condition, signal levels up to
the supplies are blocked.
The ADG1413 exhibits break-before-make switching action for
use in multiplexer applications. Inherent in the design is low
charge injection for minimum transients when switching the
digital inputs.
PRODUCT HIGHLIGHTS
1. 2Ω Max On Resistance over temperature.
2. Minimum distortion
3. 3 V logic-compatible digital inputs: VIH = 2.0 V, VIL = 0.8 V.
4. No VL logic power supply required.
5. Ultralow power dissipation: <0.03 µW.
6. 16-lead TSSOP and 4 mm × 4 mm LFCSP packages.
Rev. PrE
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 © 2007 Analog Devices, Inc. All rights reserved.
1 page  
Preliminary Technical Data
ADG1411/ADG1412/ADG1413
SINGLE SUPPLY
VDD = 12 V ± 10%, VSS = 0 V, GND = 0 V, unless otherwise noted.
Table 2.
ANALOG SWITCH
Analog Signal Range
On Resistance (RON)
On Resistance Match Between
Channels (∆RON)
25°C
2
3
0.1
Y Version
−40°C to
+85°C
4
−40°C to
+125°C
0 V to VDD
On Resistance Flatness (RFLAT(ON))
LEAKAGE CURRENTS
Source Off Leakage, IS (Off)
Drain Off Leakage, ID (Off)
Channel On Leakage, ID, IS (On)
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IINLor IINH
0.1
±0.01
±0.5
±0.01
±0.5
±0.04
±1
0.001
Digital Input Capacitance, CIN
DYNAMIC CHARACTERISTICS1
tON
tOFF
Break-Before-Make Time Delay, tD
(ADG1413 only)
Charge Injection
Off Isolation
Channel-to-Channel Crosstalk
Total Harmonic Distortion + Noise
−3 dB Bandwidth
CS (Off)
CD (Off)
CD, CS (On)
POWER REQUIREMENTS
IDD
3
120
155
45
65
50
50
50
60
0.015
200
35
35
150
0.001
IDD 220
VDD
±2.5
±2.5
±5
±5
±5
±5
2.0
0.8
±0.5
225
85
10
1
320
5/16.5
1 Guaranteed by design, not subject to production test.
Unit Test Conditions/Comments
V
Ω typ
Ω max
Ω typ
Ω max
Ω typ
nA typ
nA max
nA typ
nA max
nA typ
nA max
VS = +10 V, IS = −10 mA; Figure 20
VDD = +10.8 V, VSS = 0 V
VS = +10 V, IS = −10 mA
VS = −5 V/0 V/+5 V, IS = −10 mA
VDD = 13.2 V, VSS = 0 V
VS = 1 V/10 V, VD = 10 V/0 V; Figure 21
VS = 1 V/10 V, VD = 10 V/0 V; Figure 21
VS = VD = 1 V or 10 V; Figure 22
V min
V max
µA typ
µA max
pF typ
VIN = VINL or VINH
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
dB typ
dB typ
% typ
MHz typ
pF typ
pF typ
pF typ
µA typ
µA max
µA typ
µA max
V
min/max
RL = 300 Ω, CL = 35 pF
VS = 8 V; Figure 23
RL = 300 Ω, CL = 35 pF
VS = 8 V; Figure 23
RL = 300 Ω, CL = 35 pF
VS1 = VS2 = 8 V; Figure 24
VS = 6 V, RS = 0 Ω, CL = 1 nF; Figure 25
RL = 50 Ω, CL = 5 pF, f = 1 MHz; Figure 26
RL = 50 Ω, CL = 5 pF, f = 1 MHz; Figure 27
RL = 110 Ω, 5 V rms, f = 20 Hz to 20 kHz
RL = 50 Ω, CL = 5 pF; Figure 28
Vs = 6V, f = 1 MHz
Vs = 6V, f = 1 MHz
Vs = 6V, f = 1 MHz
VDD = 13.2 V
Digital inputs = 0 V or VDD
Digital inputs = 5 V
Gnd = 0V, Vss = 0V
Rev. PrE | Page 5 of 17
5 Page 
Preliminary Technical Data
ADG1411/ADG1412/ADG1413
Figure 10. Logic Threshold Voltage vs. Supply Voltage
Figure 13. TON/TOFF Times vs. Temperature
Figure 11. IDD vs. Logic Level
Figure 14. Off Isolation vs. Frequency
Figure 12. Charge Injection vs. Source Voltage
Figure 15. Crosstalk vs. Frequency
Rev. PrE | Page 11 of 17
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet ADG1413.PDF ] | |
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