|
|
PDF DS28CM00 Data sheet ( Hoja de datos )
| Número de pieza | DS28CM00 | |
| Descripción | SMBus Silicon Serial Number | |
| Fabricantes | Maxim Integrated Products | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de DS28CM00 (archivo pdf) en la parte inferior de esta página. Total 9 Páginas | ||
|
No Preview Available !
DS28CM00
I²C/SMBus Silicon Serial Number
www.maxim-ic.com
GENERAL DESCRIPTION
The DS28CM00 is a low-cost, electronic registration
number to provide an absolutely unique identity that
can be determined with the industry standard I²C and
SMBus interface. The registration number is a
factory-lasered, 64-bit ROM that includes a unique
48-bit serial number, an 8-bit CRC, and an 8-bit
family code (70h). In SMBus mode, the DS28CM00
resets its communication interface if it detects a bus
fault condition.
APPLICATIONS
Printed Circuit Board Unique Serialization
Accessory and Peripheral Identification
Equipment Registration and License Management
Network Node Identification
FEATURES
Unique, Factory-Lasered and Tested 64-bit
Registration Number (8-bit Family Code + 48-bit
Serial Number + 8-bit CRC)
SMBus-Compatible I²C Serial Interface
Supports 100kHz and 400kHz Communication
Speeds
5V Tolerant Interface Pins
Operating Range: 1.8V ±10% to 5V ±5%, -40°C
to +85°C
5-Pin SOT23 Package
ORDERING INFORMATION
PART
TEMP RANGE PIN-PACKAGE
DS28CM00R-A00+T
-40°C to +85°C
SOT23-5
Tape-and-Reel
+Denotes lead-free package.
TYPICAL OPERATING CIRCUIT
www.DataSheet4U.com
VCC
RP RP
VCC
SDA
SCL
µC
GND
VCC
SDA
SCL
DS28CM00
GND
PIN CONFIGURATION
SCL
GND
SDA
1
2
3
5
4
SOT23
VCC
NC
Note: Some revisions of this device may incorporate deviations from published specifications known as errata. Multiple revisions of any device
may be simultaneously available through various sales channels. For information about device errata, click here: www.maxim-ic.com/errata.
1 of 9
REV: 072406
1 page  
DS28CM00: I²C/SMBus Silicon Serial Number
DEVICE OPERATION
Typically, the DS28CM00 is accessed after power-up to read the 64-bit Registration number, which may serve to
identify the object that the device is embedded in. Write access exists only to the Control Register. Read and write
access are controlled through the I²C/SMBus serial interface. See section Read and Write for details.
Serial Communication Interface
General Characteristics
The serial interface uses a data line (SDA) plus a clock signal (SCL) for communication. Both SDA and SCL are
bidirectional lines, connected to a positive supply voltage through a pullup resistor. When there is no
communication, both lines are HIGH. The output stages of devices connected to the bus must have an open-drain
or open-collector to perform the wired-AND function. Data can be transferred at rates of up to 100kbps in the
Standard-mode, up to 400kbps in the Fast-mode. The DS28CM00 works in both modes.
A device that sends data on the bus is defined as a transmitter, and a device receiving data as a receiver. The
device that controls the communication is called a “master.” The devices that are controlled by the master are
“slaves.” The DS28CM00 is a slave device.
Slave Address/Direction Byte
To be individually accessed, each device must have a slave address that does not conflict with other devices on
the bus. The slave address to which the DS28CM00 responds is shown in Figure 3. The slave address is part of
the slave-address/direction byte. The last bit of the slave-address/direction byte (R/W) defines the data direction.
When set to a 0, subsequent data will flow from master to slave (write access mode); when set to a 1, data will flow
from slave to master (read access mode).
Figure 3. DS28CM00 Slave Address
7-Bit Slave Address
A6 A5 A4 A3 A2 A1 A0
1 0 1 0 0 0 0 R/W
Most Signi-
ficant Bit
Determines
Read or Write
I²C/SMBus Protocol
Data transfers may be initiated only when the bus is not busy. The master generates the serial clock (SCL),
controls the bus access, generates the START and STOP conditions, and determines the number of bytes
transferred between START and STOP (Figure 4). Data is transferred in bytes with the most significant bit being
transmitted first. After each byte follows an acknowledge bit to allow synchronization between master and slave.
During any data transfer, SDA must remain stable whenever the clock line is HIGH. Changes in SDA line while
SCL is high will be interpreted as a START or a STOP. The protocol is illustrated in Figure 4. For detailed timing
references see Figure 5.
5 of 9
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet DS28CM00.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| DS28CM00 | SMBus Silicon Serial Number | Maxim Integrated Products |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |