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PDF W3EG7266S-BD4 Data sheet ( Hoja de datos )
| Número de pieza | W3EG7266S-BD4 | |
| Descripción | 512MB - 64Mx72 DDR SDRAM UNBUFFERED ECC | |
| Fabricantes | White Electronic | |
| Logotipo |  |
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White Electronic Designs
W3EG7266S-AD4
-BD4
PRELIMINARY*
512MB – 64Mx72 DDR SDRAM UNBUFFERED ECC w/PLL
FEATURES
Double-data-rate architecture
DDR200, DDR266, DDR300 and DDR400
• JEDEC design specifications
Bi-directional data strobes (DQS)
Differential clock inputs (CK & CK#)
Programmable Read Latency 2,2.5 (clock)
Programmable Burst Length (2,4,8)
Programmable Burst type (sequential & interleave)
Edge aligned data output, center aligned data input
Auto and self refresh
Serial presence detect
Power supply:
• VCC = VCCQ = +2.5V ± 0.2V (100, 133 and
166MHz)
www.DataSheet4U.com
• VCC = VCCQ = +2.6V ± 0.1V (200MHz)
JEDEC standard 200 pin SO-DIMM package
• Package height options:
AD4: 35.05 mm (1.38”)
BD4: 31.75 mm (1.25”)
DESCRIPTION
The W3EG7266S is a 64Mx72 Double Data Rate
SDRAM memory module based on 512Mb DDR SDRAM
components. The module consists of nine 64Mx8 DDR
SDRAMs in 66 pin TSOP packages mounted on a 200
pin FR4 substrate.
Synchronous design allows precise cycle control with the
use of system clock. Data I/O transactions are possible
on both edges and Burst Lengths allow the same device to
be useful for a variety of high bandwidth, high performance
memory system applications.
* This data sheet describes a product that is not fully qualified or characterized and is
subject to change without notice.
NOTE: Consult factory for availability of:
• Lead-Free Products
• Vendor source control options
• Industrial temperature options
Clock Speed
CL-tRCD-tRP
DDR400@CL=3
200MHz
3-3-3
OPERATING FREQUENCIES
DDR333@CL=2.5
166MHz
2.5-3-3
DDR266@CL=2
133MHz
2-2-2
DDR266@CL=2.5
133MHz
2.5-3-3
DDR200@CL=2
100MHz
2-2-2
October 2004
Rev. 7
1 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
1 page  
White Electronic Designs
W3EG7266S-AD4
-BD4
PRELIMINARY
IDD SPECIFICATIONS AND TEST CONDITIONS
0°C ≤ TA ≤ 70°C, VCC = VCCQ = 2.5V ± 0.2V (100, 133, 166MHz), VCC = VCCQ = +2.6V ± 0.1V (200MHz)
DDR400@
CL=3
DDR333@
CL=2.5
DDR266@
CL=2, 2.5
DDR200@
CL=2
Parameter
Symbol Conditions
Max Max Max Max
Operating Current
IDD0 One device bank; Active - Precharge;
1670
1445
1445
1445
(MIN); DQ,DM and DQS inputs
changing once per clock cycle;
Address and control inputs changing
once every two cycles. TRC=TRC(MIN);
TCK=TCK
Operating Current
IDD1 One device bank; Active-
1940 1715 1715 1715
Read-Precharge; Burst = 2;
TRC=TRC(MIN);TCK=TCK (MIN); Iout
= 0mA; Address and control inputs
changing once per clock cycle.
Precharge Power-
IDD2P All device banks idle; Power-down
45
45
45
45
Down Standby
mode; TCK=TCK(MIN); CKE=(low)
Current
Idle Standby Current IDD2F CS# = High; All device banks idle;
770
680
680
680
TCK=TCK(MIN); CKE = high; Address
and other control inputs changing once
per clock cycle. VIN = VREF for DQ,
DQS and DM.
Active Power-Down IDD3P One device bank active; Power-down
405
315
315
315
Standby Current
mode; TCK(MIN); CKE=(low)
Active Standby
IDD3N CS# = High; CKE = High; One
815 725 725 725
Current
device bank; Active-Precharge;
TRC=TRAS(MAX); TCK=TCK(MIN); DQ,
DM and DQS inputs changing twice
per clock cycle; Address and other
control inputs changing once per clock
cycle.
Operating Current
IDD4R Burst = 2; Reads; Continous burst;
1985
1760
1760
1760
One device bank active;Address
andcontrol inputs changing once
per clock cycle; TCK=TCK(MIN); IOUT
= 0mA.
Operating Current
IDD4W Burst = 2; Writes; Continous burst;
2030
1850
1670
1670
One device bank active; Address and
control inputs changing once per clock
cycle; TCK=TCK(MIN); DQ,DM and
DQS inputs changing twice per clock
cycle.
Auto Refresh Current IDD5 TRC=TRC(MIN)
3360 2885 2885 2885
Self Refresh Current IDD6 CKE ≤ 0.2V
320 320 320 320
Operating Current
IDD7A Four bank interleaving Reads (BL=4)
4325
3875
3875
3875
with auto precharge with TRC=TRC
(MIN); TCK=TCK(MIN); Address and
control inputs change only during
Active Read or Write commands
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
October 2004
Rev. 7
5 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
5 Page 
White Electronic Designs
W3EG7266S-AD4
-BD4
PRELIMINARY
ORDERING INFORMATION FOR BD4
Part Number
W3EG7266S403BD4
W3EG7266S335BD4
W3EG7266S262BD4
W3EG7266S265BD4
W3EG7266S202BD4
Speed
200MHz/400Mbps, CL=3
166MHz/333Mbps, CL=2.5
133MHz/266Mbps, CL=2
133MHz/266Mbps, CL=2.5
100MHz/200Mbps, CL=2
Height*
31.75 (1.25")
31.75 (1.25")
31.75 (1.25")
31.75 (1.25")
31.75 (1.25")
Commercial Operating Range
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
0°C to 70°C
INDUSTRIAL
Part Number
Speed
Height*
Industrial Operating Range
W3EG7266S403BD4I
200MHz/400Mbps, CL=3
31.75 (1.25")
-40°C to 85°C
W3EG7266S335BD4I
W3EG7266S262BD4I
W3EG7266S265BD4I
W3EG7266S202BD4I
166MHz/333Mbps, CL=2.5
133MHz/266Mbps, CL=2
133MHz/266Mbps, CL=2.5
100MHz/200Mbps, CL=2
31.75 (1.25")
31.75 (1.25")
31.75 (1.25")
31.75 (1.25")
-40°C to 85°C
-40°C to 85°C
-40°C to 85°C
-40°C to 85°C
NOTES:
• Consult Factory for availability of Lead-Free products. (F = Lead-Free, G = RoHS Compliant)
• Product specific part numbers are available for source control if needed, please consult factory for the correct part number if a specific component vendor is preferred.
• Consult factory for availability of industrial temperature (-40°C to 85°C) option
PACKAGE DIMENSIONS FOR BD4
3.98 ± 0.1
(0.157 ± 0.004)
67.56
(2.666) MAX
2.31
(0.091) REF.
11.40
(0.449)
4.19
(0.165)
1.80
(0.071)
47.40
(1.866)
3.81
(0.150) MAX.
31.75
(1.25)
20
(0.787)
3.98
(0.157) MIN.
1.0 ± 0.1
(0.039 ± 0.004)
* ALL DIMENSIONS ARE IN MILLIMETERS AND (INCHES)
October 2004
Rev. 7
11 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com
11 Page | ||
| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet W3EG7266S-BD4.PDF ] | |
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