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PDF X9409 Data sheet ( Hoja de datos )

Número de pieza X9409
Descripción Quad Digitally Controlled Potentiometers
Fabricantes Intersil Corporation 
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No Preview Available ! X9409 Hoja de datos, Descripción, Manual

DATASHEET
Low Noise/Low Power/2-Wire Bus Quad Digitally
Controlled Potentiometers (XDCP™)
X9409
The X9409 integrates 4 digitally controlled potentiometers
(XDCP) on a monolithic CMOS integrated microcircuit.
The digitally controlled potentiometer is implemented using
63 resistive elements in a series array. Between each element
are tap points connected to the wiper terminal through
switches. The position of the wiper on the array is controlled by
the user through the 2-wire bus interface. Each potentiometer
has associated with it a volatile Wiper Counter Register (WCR)
and 4 nonvolatile Data Registers (DR0:DR3) that can be
directly written to and read by the user. The contents of the
WCR controls the position of the wiper on the resistor array
through the switches. Power-up recalls the contents of DR0 to
the WCR.
The XDCP can be used as a three-terminal potentiometer or as
a two-terminal variable resistor in a wide variety of
applications including control, parameter adjustments and
signal processing.
Features
• Four potentiometers per package
• 64 resistor taps
• 2-wire serial interface for write, read and transfer operations
of the potentiometer
• 50Ω wiper resistance, typical at 5V
• Four nonvolatile data registers for each potentiometer
• Nonvolatile storage of multiple wiper position
• Power-on recall. Loads saved wiper position on power-up
standby current < 1µA typical
• System VCC: 2.7V operation
• 10kΩ end-to-end resistance
• 100 year data retention
• Endurance: 100,000 data changes per bit per register
• Low power CMOS
• 24 Ld TSSOP
• Pb-free (RoHS compliant)
VCC
VSS
WP
SCL
SDA
A0
A1
A2
A3
INTERFACE
AND
CONTROL
CIRCUITRY
8
DATA
POT 0
R0 R1
WIPER
COUNTER
REGISTER
R2 R3
(WCR)
VH0/RHO
VL0/
RLO
VW0/
RWO
R0 R1 WIPER
COUNTER
REGISTER
R2 R3
(WCR)
RESISTOR
ARRAY
POT 2
VH2/RH2
VL2/RL2
VW2/RW2
R0 R1
R2 R3
WIPER
COUNTER
REGISTER
(WCR)
RESISTOR
ARRAY
POT 1
VW1/
RW1
VH1/
RH1
VL1/RL1
VW3/RW3
R0 R1
R2 R3
WIPER
COUNTER
REGISTER
(WCR)
RESISTOR
ARRAY
Pot 3
VH3/RH3
VL3/RL3
FIGURE 1. BLOCK DIAGRAM
September 3, 2015
FN8192.6
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2005-2006, 2015. All Rights Reserved
Intersil (and design) and XDCP are trademarks owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.

1 page




X9409 pdf
X9409
Absolute Maximum Ratings
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V
Temperature under bias . . . . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +135°C
Storage temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
Voltage on SDA, SCL or any address input with respect to VSS .-1V to +7V
V = |VH - VL | . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V
ESD Rating
Human Body Model (Tested per JESD22-A114E) . . . . . . . . . . . . . . . 4kV
Machine Model (Tested per JESD22-A115-A) . . . . . . . . . . . . . . . . 300V
Thermal Information
Thermal Resistance
JA (°C/W) JC (°C/W)
24 Ld TSSOP (Notes 4, 5) . . . . . . . . . . . . . .
71
19
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see TB493
Recommended Operating Conditions
Commercial. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C
Industrial . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
4. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
Brief TB379.
5. For JC, the “case temp” location is taken at the package top center.
Analog Characteristics Across the recommended operating conditions unless otherwise specified.
SYMBOL
PARAMETER
End-to-end Resistance Tolerance
Power Rating
IW
RW
VTERM
Wiper Current
Wiper Resistance
Voltage On Any VH/RH or VL/RL pin
Noise
Resolution (Note 10)
Absolute Linearity (Note 7)
Relative Linearity (Note 8)
Temperature Coefficient Of RTOTAL
Ratiometric Temp. Coefficient
CH/CL/CW Potentiometer Capacitances
IAL RH, RL, RW Leakage Current
D.C. OPERATING CHARACTERISTICS
ICC1 VCC Supply Current (Active)
ICC2 VCC Supply Current (Nonvolatile Write)
ISB VCC Current (Standby)
ILI Input Leakage Current
ILO Output Leakage Current
VIH Input HIGH Voltage
VIL Input LOW Voltage
VOL Output LOW Voltage
ENDURANCE AND DATA RETENTION
Minimum Endurance
TEST CONDITIONS
+25°C, each pot at 5V, 2.5k
IW = ±3mA, VCC = 3V to 5V
VSS = 0V
Ref: 1kHz
Vw(n)(actual) - Vw(n)(expected)
Vw(n + 1) - [Vw(n) + MI]
See macro model
VIN = VSS to VCC. Device is in stand-by mode.
MIN MAX
(Note 6) TYP (Note 6)
UNITS
±20 %
15 mW
-3 +3 mA
50 150
Ω
VSS VCC
-
V
dBV
1.6 %
-1 +1 MI (Note 9)
-0.2 +0.2 MI (Note 9)
30 ppm/°C
20 ppm/°C
10/ pF
0.1 10
µA
fSCL = 400kHz, SDA = open, other inputs = VSS
fSCL = 400kHz, SDA = open, other inputs = VSS
SCL = SDA = VCC, addr. = VSS
VIN = VSS to VCC
VOUT = VSS to VCC
VCC x 0.7
-0.5
IOL = 3mA
100
1
3
10
10
VCC + 0.5
VCC x 0.1
0.4
µA
mA
µA
µA
µA
V
V
V
100,000
Data
changes per
bit per
register
Data Retention
100 Years
Submit Document Feedback
5
FN8192.6
September 3, 2015

5 Page





X9409 arduino
X9409
SCL
SDA
S 0 1 0 1 A3 A2 A1 A0 A I3 I2 I1 I0 R1 R0 P1 P0 A I I
T C CNN
A K KCC
R 12
T
FIGURE 9. INCREMENT/ DECREMENT INSTRUCTION SEQUENCE
INC/DEC
CMD
ISSUED
SCL
tWRID
ID
NE
CC
n1
DS
ET
CO
nP
SDA
VW/RW
VOLTAGE OUT
FIGURE 10. INCREMENT/ DECREMENT TIMING LIMITS
SCL FROM
MASTER
DATA OUTPUT
FROM TRANSMITTER
1
89
DATA OUTPUT
FROM RECEIVER
START
ACKNOWLEDGE
FIGURE 11. ACKNOWLEDGE RESPONSE FROM RECEIVER
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September 3, 2015

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