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PDF XP1013 Data sheet ( Hoja de datos )
| Número de pieza | XP1013 | |
| Descripción | GaAs MMIC Power Amplifier | |
| Fabricantes | Mimix Broadband | |
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Hay una vista previa y un enlace de descarga de XP1013 (archivo pdf) en la parte inferior de esta página. Total 7 Páginas | ||
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17.0-26.0 GHz GaAs MMIC
Power Amplifier
May 2005 - Rev 05-May-05
Features
Excellent Saturated Output Stage
Competitive RF/DC Bias Pin for Pin Replacement
20.0 dB Small Signal Gain
+24.0 dBm Saturated Output Power
100% On-Wafer RF, DC and Output Power Testing
100% Visual Inspection to MIL-STD-883
Method 2010
Chip Device Layout
P1013
General Description
Mimix Broadband’s three stage 17.0-26.0 GHz GaAs
MMIC power amplifier has a small signal gain of 20.0
dB with a +24.0 dBm saturated output power.This
MMIC uses Mimix Broadband’s 0.15 µm GaAs PHEMT
device model technology, and is based upon electron
beam lithography to ensure high repeatability and
uniformity.The chip has surface passivation to protect
and provide a rugged part with backside via holes
and gold metallization to allow either a conductive
epoxy or eutectic solder die attach process.This
www.DataSheet4U.com
device is well suited for Millimeter-wave Point-to-
Point Radio, LMDS, SATCOM and VSAT applications.
Absolute Maximum Ratings
Supply Voltage (Vd)
Supply Current (Id)
Gate Bias Voltage (Vg)
Input Power (Pin)
Storage Temperature (Tstg)
Operating Temperature (Ta)
Channel Temperature (Tch)
+9.0 VDC
650 mA
+0.3 VDC
+5.0 dBm
-65 to +165 OC
-55 to MTTF Table1
MTTF Table1
(1) Channel temperature affects a device's MTTF. It is
recommended to keep channel temperature as low as
possible for maximum life.
Electrical Characteristics (Ambient Temperature T = 25 oC)
Parameter
Frequency Range (f )
Input Return Loss (S11)
Output Return Loss (S22)
Small Signal Gain (S21)
Gain Flatness (ΔS21)
Reverse Isolation (S12)
Saturated Output Power (Psat)
Drain Bias Voltage (Vd1,2,3)
Gate Bias Voltage (Vg1,2,3)
Supply Current (Id) (Vd=6.0V, Vg=-0.7V Typical)
Units Min. Typ. Max.
GHz 17.0 - 26.0
dB - 10.0 -
dB - 10.0 -
dB - 20.0 -
dB - +/-2.0 -
dB - 50.0 -
dBm - +24.0 -
VDC - +6.0 +8.0
VDC -1.0 -0.7 0.0
mA - 320 480
Mimix Broadband, Inc., 10795 Rockley Rd., Houston, Texas 77099
Tel: 281.988.4600 Fax: 281.988.4615 mimixbroadband.com
Page 1 of 7
Characteristic Data and Specifications are subject to change without notice. ©2005 Mimix Broadband, Inc.
Export of this item may require appropriate export licensing from the U.S. Government. In purchasing these parts, U.S. Domestic customers accept
their obligation to be compliant with U.S. Export Laws.
1 page  
17.0-26.0 GHz GaAs MMIC
Power Amplifier
May 2005 - Rev 05-May-05
P1013
App Note [1] Biasing - It is recommended to separately bias each amplifier stage Vd1 through Vd3 at Vd(1,2,3)=6.0V with Id1=47mA,
Id2=90mA and Id3=180mA. Separate biasing is recommended if the amplifier is to be used at high levels of saturation, where gate
rectification will alter the effective gate control voltage. For non-critical applications it is possible to parallel all stages and adjust the
common gate voltage for a total drain current Id(total)=320 mA. It is also recommended to use active biasing to keep the currents
constant as the RF power and temperature vary; this gives the most reproducible results. Depending on the supply voltage available
and the power dissipation constraints, the bias circuit may be a single transistor or a low power operational amplifier, with a low
value resistor in series with the drain supply used to sense the current.The gate of the pHEMT is controlled to maintain correct drain
current and thus drain voltage. The typical gate voltage needed to do this is -0.7V.Typically the gate is protected with Silicon diodes
to limit the applied voltage. Also, make sure to sequence the applied voltage to ensure negative gate bias is available before
applying the positive drain supply.
App Note [2] Bias Arrangement -
For Parallel Stage Bias (Recommended for general applications) -- The same as Individual Stage Bias but all the drain or gate pad DC
bypass capacitors (~1000-2200 pF) can be combined. Additional DC bypass capacitance (~0.01 uF) is also recommended to all DC or
combination (if gate or drains are tied together) of DC bias pads.
For Individual Stage Bias (Recommended for saturated applications) -- Each DC pad (Vd1, 2, 3 and Vg1, 2, 3) needs to have DC bypass
capacitance (~1000-2200 pF) as close to the device as possible. Additional DC bypass capacitance (~0.01 uF) is also recommended.
MTTF Tables
These numbers were calculated based on accelerated life test information and thermal model analysis received from the fabricating foundry.
Backplate
Temperature
Channel
Temperature
Rth
MTTF Hours
FITs
55 deg Celsius
75 deg Celsius
95 deg Celsius
176.3 deg Celsius
204.0 deg Celsius
231.1 deg Celsius
63.8° C/W
67.8° C/W
71.6° C/W
9.79E+06
9.32E+05
1.21E+05
1.02E+02
1.07E+03
8.30E+03
Bias Conditions: Vd1=Vd2=Vd3=6.0V, Id1=47 mA, Id2=90 mA, Id3=180 mA
Mimix Broadband, Inc., 10795 Rockley Rd., Houston, Texas 77099
Tel: 281.988.4600 Fax: 281.988.4615 mimixbroadband.com
Page 5 of 7
Characteristic Data and Specifications are subject to change without notice. ©2005 Mimix Broadband, Inc.
Export of this item may require appropriate export licensing from the U.S. Government. In purchasing these parts, U.S. Domestic customers accept
their obligation to be compliant with U.S. Export Laws.
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet XP1013.PDF ] | |
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