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PDF HI3318 Data sheet ( Hoja de datos )

Número de pieza HI3318
Descripción Flash A/D Converter
Fabricantes Intersil Corporation　
Logotipo Intersil Corporation Logotipo



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No Preview Available ! HI3318 Hoja de datos, Descripción, Manual

HI3318
August 1997
8-Bit, 15 MSPS, Flash A/D Converter
Features
Description
• CMOS Low Power (Typ). . . . . . . . . . . . . . . . . . . 150mW
• Parallel Conversion Technique
• Sampling Rate at 5V Supply . . . . . . . . . . . . . . . . 15MHz
• 8-Bit Latched Three-State Output with Overflow Bit
• Accuracy (Typ) . . . . . . . . . . . . . . . . . . . . . . . . . . ±1 LSB
• Single Supply Voltage . . . . . . . . . . . . . . . . . . 4V to 7.5V
• Linearity (INL):
- HI3318JIP . . . . . . . . . . . . . . . . . . . . . . . . . . . ±1.5 LSB
- HI3318JIB . . . . . . . . . . . . . . . . . . . . . . . . . . . ±1.5 LSB
• Sampling Rate:
- HI3318JIP . . . . . . . . . . . . . . . . . . . . . . . 15MHz (67ns)
- HI3318JIB . . . . . . . . . . . . . . . . . . . . . . . 15MHz (67ns)
• Video Digitizing
• High-Speed A/D Conversion
• Medical Imaging
www.DataSheet4U.com • Radar Signal Processing
• Digital Communications Systems
The HI3318 is a CMOS parallel (FLASH) analog-to-digital
converter designed for applications demanding both low
power consumption and high speed digitization.
The HI3318 operates over a wide full scale input voltage
range of 4V up to 7.5V with maximum power consumption
depending upon the clock frequency selected. When oper-
ated from a 5V supply at a clock frequency of 15MHz, the
typical power consumption of the HI3318 is 150mW.
256 paralleled auto balanced voltage comparators measure
the input voltage with respect to a known reference to pro-
duce the parallel bit outputs in the HI3318. 255 comparators
are required to quantize all input voltage levels in this 8-bit
converter, and the additional comparator is required for the
overflow bit.
Ordering Information
TEMP.
PART NUMBER RANGE (oC)
PACKAGE
HI3318JIP
-40 to 85 24 Ld PDIP
HI3318JIB
-40 to 85 24 Ld SOIC
PKG.
NO.
E24.6
M24.3
Pinout
HI3318
(PDIP, SOIC)
TOP VIEW
(LSB) B1 1
B2 2
B3 3
B4 4
B5 5
B6 6
B7 7
(MSB) B8 8
OVERFLOW 9
1/4R 10
(DIG. GND) VSS 11
(DIG. SUP.) VDD 12
24 VAA+ (ANA. SUP.)
23 3/4R
22 VREF+
21 VIN
20 p
19 PHASE
18 CLK
17 VAA- (ANA. GND)
16 VIN
15 VREF -
14 CE1
13 CE2
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
4-1452
File Number 4135.1

1 page




HI3318 pdf
Timing Waveforms (Continued)
HI3318
CE1
CE2
tDIS
tEN
BITS 1 - 8 DATA
HIGH
IMPEDANCE
tDIS
DATA
tEN
HIGH
IMPEDANCE
OF DATA
HIGH
IMPEDANCE
FIGURE 2. OUTPUT ENABLE TIMING DIAGRAM
DATA
CLOCK
DATA
AUTO
BALANCE
NO MAX
LIMIT
SAMPLE
N
25ns
MIN
AUTO
BALANCE
33ns
MIN
SAMPLE
N+1
25ns
MIN
50ns
MIN
FIGURE 3A. STANDBY IN INDEFINITE AUTO BALANCE (SHOWN WITH PHASE = LOW)
CLOCK
DATA
SAMPLE
N
500ns
MAX
AUTO
BALANCE
33ns
MIN
SAMPLE
N+1
25ns
MIN
AUTO
BALANCE
50ns
TYP
DATA
N-1
SAMPLE
N+2
DATA
N
FIGURE 3B. STANDBY IN SAMPLE (SHOWN WITH PHASE = LOW)
FIGURE 3. PULSE MODE OPERATION
4-1456

5 Page





HI3318 arduino
HI3318
SIGNAL
SOURCE
SIGNAL
GROUND
AMP
REF
VIN
VIN
OUTPUT
DRIVERS
VREF+
TO
DIGITAL
SYSTEM
REFERENCE
TAPS
VAA+
VDD
VREF -
VAA-
VSS
- ANALOG +
SUPPLIES
VAA
SUPPLY
VDD
SUPPLY
FIGURE 15. TYPICAL SYSTEM GROUNDING/BYPASSING
SYSTEM
DIGITAL
GROUND
75Ω
1VP-P
VIDEO
INPUT
75Ω
10Ω
14 7
11 8
5pF 9 CA3450
3 13
12
5
4
6
+8V
0.001µF
0.001µF
10Ω
390Ω
16
A/D FLASH
INPUT
21
10Ω 750
-4V 0.1
110Ω
0V TO -10V
OFFSET SOURCE
RS < 10Ω
NOTE: Ground-planing and tight layout are extremely important.
FIGURE 16. TYPICAL HIGH BANDWIDTH AMPLIFIER FOR DRIVING THE HI3318
4-1462

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