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PDF HI20203 Data sheet ( Hoja de datos )
| Número de pieza | HI20203 | |
| Descripción | Ultra High-Speed D/A Converter | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de HI20203 (archivo pdf) en la parte inferior de esta página. Total 10 Páginas | ||
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August 2000
HI20203F® Oc1oR-8n8Ata8Pc-ItONOoTSBuESSrRIOBTSLeLIcELEhToSnErUicPwBaRwlSOSTwuDI.TipUnUptCTeoTErrst PiCl.RceoOnmtDe/UrtsaCctT
Ultra
8-Bit, 160 MSPS,
High-Speed D/A Converter
Features
Description
• Throughput Rate . . . . . . . . . . . . . . . . . . . . . . . . 160MHz
• 8-Bit (HI20203) Resolution
• Differential Linearity Error . . . . . . . . . . . . . . . . 0.5 LSB
• Low Glitch Noise
• Analog Multiplying Function
• Low Power Consumption . . . . . . . . . . . . . . . . . . 420mW
• Evaluation Board Available
• Direct Replacement for the Sony CX20201-3, CX20202-3
Applications
• Wireless Communications
• Signal Reconstruction
The HI20203 is an 8-bit, 160MHz ultra high speed D/A con-
verter. The converter is based on an R2R switched current
source architecture that includes an input data register with
a complement feature and is Emitter Coupled Logic (ECL)
compatible.
The HI20203 is an 8-bit accurate D/A with a linearity error of
0.5 LSB.
For 10-bit resolution, please refer to the HI20201 data sheet.
Part Number Information
PART
NUMBER
HI20203JCB
TEMP.
RANGE (oC)
PACKAGE
-20 to 75 28 Ld SOIC
PKG. NO.
M28.3A-S
• Direct Digital Synthesis
• High Definition Video Systems
• Digital Measurement Systems
www.DataSheet4U.com
• Radar
Pinout
HI20203
(PDIP, SOIC)
TOP VIEW
(MSB) D7 1
D6 2
D5 3
D4 4
D3 5
D2 6
D1 7
D0 8
NC 9
NC 10
NC 11
NC 12
CLK 13
CLK 14
28 AVSS
27 VREF
26 AVEE
25 NC
24 NC
23 NC
22 NC
21 NC
20 IOUT
19 NC
18 AVSS
17 DVSS
16 COMPL
15 DVEE
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2002. All Rights Reserved
1
File Number 4096.2
1 page  
Typical Performance Curves
-2.0
TA = 25oC, VEE = -5.2V
LINEAR AREA
-1.0
RL = 10kΩ
RL = 75Ω
HI20203
1.05
1.00
RL = 10kΩ
RL = 75Ω
0
0.5 1.0
VREF - VEE (V)
FIGURE 2. VO(FS) RATIO vs (VREF - VEE)
1.5
0
GAIN
0
PHASE
-10 -90
-180
0.95
-20
0 20 40 60
AMBIENT TEMPERATURE (oC)
80
FIGURE 3. FULL SCALE OUTPUT VOLTAGE vs AMBIENT
TEMPERATURE
10.0 fCLK = 100MHz
8.0
6.0
4.0
2.0
-20
10K
100K
1M
10M
100M
MULTIPLYING INPUT SIGNAL FREQUENCY (Hz)
-50 0 50 100
CASE TEMPERATURE (oC)
FIGURE 4. OUTPUT CHARACTERISTICS vs MULTIPLYING
INPUT SIGNAL FREQUENCY
FIGURE 5. GLITCH ENERGY vs CASE TEMPERATURE
(FULL SCALE - 1023mV)
Pin Descriptions
28 PIN SOIC
1-8
11, 12, 19,
21-25
13
14
15
16
17
18
20
26
27
PIN NAME
PIN DESCRIPTION
D0 (LSB) - D7 (MSB) Digital Data Bit 0, the Least Significant Bit thru Digital Data Bit 7, the Most Significant Bit.
NC No connect, not used.
CLK
CLK
DVEE
COMPL
DVSS
AVSS
IOUT
AVEE
VREF
Negative Differential Clock Input.
Positive Differential Clock Input
Digital (ECL) Power Supply -4.75V to -7V.
Data Complement Pin. When set to a (ECL) logic High the input data is complemented in the input
buffer. When cleared to a (ECL) logic Low the input data is not complemented.
Digital Ground.
Analog Ground.
Current Output Pin.
Analog Supply -4.75V to -7V.
Input Reference Voltage used to set the output full scale range.
5
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet HI20203.PDF ] | |
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