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PDF USB97CFDC2-01 Data sheet ( Hoja de datos )
| Número de pieza | USB97CFDC2-01 | |
| Descripción | USB Floppy Disk Controller | |
| Fabricantes | SMSC Corporation | |
| Logotipo |  |
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USB97CFDC2-01
USB Floppy Disk Controller
FEATURES
www.DataSheet4U.com
3.3 Volt, Low Power Operation
Complete USB Specification 1.1 Compatibility
- Includes USB Transceiver
- Based on an Enhanced Version of SMSC’s
Industry Proven USB97C100 USB Controller
Complete System Solution Including USB Mass
Storage Class Compliant Win98/2000 Driver and
Firmware
- Supports 640K, 720K, 1.44M, 1.2M Windows 98
J, and 1.2M NEC DOS 6.x Formats
- Supports Both the UFI and SFF8070i Command
Sets
- Supports USB Mass Storage Compliant Bootable
Floppy BIOS
- 4ms Seek Times
- USB 1.1 Compliance, Including Low Power
Device Class SUSPEND Mode Operation and
Power Control of Disk Drive
- Disk Drive Feedback of Readiness Upon Power
Re-Application Option
- Option for Ultra High Performance Using
Additional Caching SRAM
- Support for Floppy Drive Power Control
Contains SMSC’s Industry Proven Floppy Disk
Controller
- Licensed CMOS 765B Floppy Disk Controller
- Supports Single Normal or Three Mode Floppy
Drives
- Supports Vertical Recording Format and High
Capacity Drives in User Written Firmware
Applications
- Detects All Overrun and Underrun Conditions
- Sophisticated Power Control Circuitry (PCC)
Including Multiple Powerdown Modes for
Reduced Power Consumption
Enhanced Digital Data Separator
- 1 Mbps, 500 Kbps, 300 Kbps, 250 Kbps Data
Rates
- Programmable Precompensation Modes
Intelligent Auto Power Management
- <250µA SUSPEND Current
- <75mA Operating Current
Integrated 32Kbyte Program ROM
- Uses external 3 wire serial EEPROM provides
storage for unique OEM identification and string
descriptors and drive option settings.
- 10 options for various drive parameters are
externally selectable via serial EEPROM data.
Optional External Program Memory Interface for
Custom Applications
- 32K Byte Code Space
- Flash, SRAM, or EPROM Memory
4KB Internal Buffer SRAM for High Performance
Operation
Integrated 14.318 MHz Crystal Driver Circuit
100 pin TQFP lead-free RoHS compliant package
(12.0 x 12.0 mm body)
- 25% smaller body size than other 100 pin TQFP
packages
ORDERING INFORMATION
Order Number:
USB97CFDC2-MV-01X for 100 pin TQFP lead-free RoHS compliant package
SMSC DS – USB97CFDC2-01
DATASHEET
Rev. 02-27-07
1 page  
2 DESCRIPTION OF PIN FUNCTIONS
nTRK0
nRDATA
nWDATA
nDSO
USB+
FD0/OPT0
FD4/IN0
FA0
FA4
FA8
FA12
nFRD
ROMEN
XTAL1/CLKIN
TST_OUT
FLOPPY DISK INTERFACE (14 Pins)
nINDEX
nWRTPRT
DRVDEN0
DRVDEN1
nWGATE
nHDSEL
nMTR0
USB INTERFACE (4 Pins)
USB-
AVDD
EXTERNAL FLASH ROM INTERFACE (26 Pins)
FD1/OPT1
FD2/OPT2
FD5/OUT0
FD6/OUT1
FA1 FA2
FA5 FA6
FA9 FA10
FA13
FA14
nFCE
MISC (10 Pins)
HDO
nDRVRDY
XTAL2
nRESET
nTESTEN
POWER, GROUNDS, and NO CONNECTS (46 Pins)
nDSKCHG
nSTEP
nDIR
AGND
FD3/OPT3
FD7/OUT2
FA3
FA7
FA11
FA15
nFDPWR
nTEST
SMSC DS – USB97CFDC2-01
Page 5
DATASHEET
Rev. 02-27-07
5 Page 
5.1 Buffer Type Descriptions
Table 1 - USB97CFDC2-01 Buffer Type Descriptions
BUFFER
DESCRIPTION
I Input
IP Input with 30uA pull-up
IS Input with Schmitt trigger
O8 Output with 8mA drive
IO8 Input/output with 8mA drive
IO8P
Input/output with 8mA drive and 30uA
pull-up
OD12
Open drain….12mA sink
O24 Output with 24mA drive
OD24
Open drain….24mA sink
ICLKx
XTAL clock input
OCLKx XTAL clock output
I/O-U
See Table 6.
SMSC DS – USB97CFDC2-01
Page 11
DATASHEET
Rev. 02-27-07
11 Page | ||
| Páginas | Total 24 Páginas | |
| PDF Descargar | [ Datasheet USB97CFDC2-01.PDF ] | |
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