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PDF USB97C211 Data sheet ( Hoja de datos )
| Número de pieza | USB97C211 | |
| Descripción | USB 2.0 Flash Media Controller | |
| Fabricantes | SMSC Corporation | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de USB97C211 (archivo pdf) en la parte inferior de esta página. Total 24 Páginas | ||
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USB97C211
ADVANCE INFORMATION
Rev 1.3
www.DataSheet4U.com
USB 2.0 Flash Media Controller
FEATURES
Complete USB Specification 2.0 Compatibility
- Includes USB 2.0 Transceiver
- A Bi-directional Control and a Bi-directional Bulk
Endpoint are provided.
Complete System Solution for interfacing
CompactFlash (CF) and SmartMedia (SM)
devices to USB 2.0 bus*
- Supports USB Bulk Only Mass Storage
Compliant Bootable BIOS
- Support for the following devices:
- CF: 300K – 15MB/sec
- SM: 2M –15MB/sec
- Support for simultaneous operation of both the
above devices.
- Enhanced CF support to allow true sequential
read operations to improve throughput
16 GPIOs for special function use: LED indicators,
button inputs, power control to memory devices, etc.
- Inputs capable of generating interrupts with
either edge sensitivity
- One GPIO has automatic 1 sec toggle capability
for flashing an LED indicator.
8051 8 bit microprocessor
- Provides low speed control functions
- 30 Mhz execution speed at 4 cycles per
instruction average
- 12K Bytes of internal SRAM for general purpose
scratchpad
- 768 Bytes of internal SRAM for general purpose
scratchpad or program execution while re-
flashing external ROM
Double Buffered Bulk Endpoint
- Bi-directional 512 Byte Buffer for Bulk Endpoint
- 64 Byte RX Control Endpoint Buffer
- 64 Byte TX Control Endpoint Buffer
External Program Memory Interface
- 64K Byte Code Space
- Flash, SRAM, or EPROM Memory
On Board 12Mhz Crystal Driver Circuit
Internal PLL for 480Mhz USB2.0 Sampling, 30Mhz
MCU clock
Supports firmware upgrade via USB bus if “boot
block” Flash program memory is used
2.5 Volt, Low Power Core Operation
3.3 Volt I/O with 5V input tolerance
128 Pin TQFP (1.0 mm height package) or QFP
Package
ORDERING INFORMATION
Order Number(s):
USB97C211-NE for TQFP Package
USB97C211-NC for QFP Package
SMSC USB97C211
Page 1
DATASHEET
Revision 1.3 (11-05-03)
1 page  
TABLE OF CONTENTS
1 GENERAL DESCRIPTION.................................................................................................................................3
2 PIN TABLE.........................................................................................................................................................6
2.1 By Interface................................................................................................................................... 6
2.2 Pin Numbers ................................................................................................................................. 7
2.2.1 128 Pin VTQFP.......................................................................................................................... 7
2.2.2 128 Pin QFP .............................................................................................................................. 8
3 PIN CONFIGURATION ......................................................................................................................................9
3.1 128 Pin VTQFP.............................................................................................................................. 9
3.2 128 Pin QFP ................................................................................................................................ 10
4 BLOCK DIAGRAM ...........................................................................................................................................11
5 PIN DESCRIPTIONS........................................................................................................................................12
5.1 Pin Descriptions......................................................................................................................... 12
5.2 Buffer Type Descriptions .......................................................................................................... 16
6 DC PARAMETERS ..........................................................................................................................................17
6.1 Maximum Guaranteed Ratings ................................................................................................. 17
7 PACKAGE OUTLINES.....................................................................................................................................20
7.1 128 Pin VTQFP Package Outline, 14X14X1.0 Body, 2 MM Footprint .................................... 20
7.2 128 Pin QFP Package Outline, 14X20X2.7 Body, 3.9 MM Footprint ...................................... 21
8 TYPICAL APPLICATION .................................................................................................................................22
9 REFERENCES .................................................................................................................................................23
10 USB97C211 REVISIONS .................................................................................................................................24
SMSC USB97C211
Page 5
DATASHEET
Revision 1.3 (11-05-03)
5 Page 
4 BLOCK DIAGRAM
Auto address generators
EP0TX_BC
EP0RX_BC
EP1TX_BC
EP1RX_BC
RAMWR_A/B
RAMRD_A/B
Address
Address
Address
Address
Address
Address
Address
512 Bytes EP2 TX/RX Buffer B
512 Bytes EP2 TX/RX Buffer A
64 Bytes EP1RX
64 Bytes EP1TX
64 Bytes EP0RX
64 Bytes EP0TX
32 Bit
60MHz
1.25KB
SRAM
Flash Media DMA Unit
DATA
Latch phase 0, 2
SIE
Latch phase 3
8051
Latch phase 1
FMC
Data @ 32 bit
15Mhz
DATA
ECC
Control/
Status
Flash Media
Controllers
(FMC)
CF
Controller
Control/
Status
SM
Controller
Control/
Status
Memory
Cards
CF
SM/SSFDC
Clocked byPhase 0, 2 Clock
SIE
( Serial Interface Engine )
32 bit 15MHz Data Buss
USB 2.0 PHY
( Transciever )
SIE Control Regs
Configuration and Control
Clock Generation
Osc
CLOCKOUT
12 MHz
Interrupt Controller
FAST 8051
CPU CORE
Work Scratchpad
SRAM (768 Byte)
GPIO
12K Byte
Program/Scratchpad
SRAM
8 pins
MEM/IO Bus 29pins
Clocked by Phase 3 Clock
Program Memory/ IO
Bus
SMSC USB97C211
Page 11
DATASHEET
Revision 1.3 (11-05-03)
11 Page | ||
| Páginas | Total 24 Páginas | |
| PDF Descargar | [ Datasheet USB97C211.PDF ] | |
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