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PDF LAN91C96I Data sheet ( Hoja de datos )

Número de pieza LAN91C96I
Descripción Non-PCI Single-Chip Full Duplex Ethernet Controller
Fabricantes SMSC Corporation 
Logotipo SMSC Corporation Logotipo



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No Preview Available ! LAN91C96I Hoja de datos, Descripción, Manual

LAN91C96I
Non-PCI Single-Chip Full
Duplex Ethernet
Controller
Product Features
ƒ Non-PCI Single-Chip Ethernet Controller
ƒ Fully Supports Full Duplex Switched Ethernet
ƒ Supports Enhanced Transmit Queue
Management
ƒ 6K Bytes of On-Chip RAM
ƒ Supports IEEE 802.3 (ANSI 8802-3) Ethernet
Standards
ƒ Automatic Detection of TX/RX Polarity Reversal
ƒ Enhanced Power Management Features
ƒ Supports “Magic Packet” Power Management
Technology
ƒ Simultasking Early Transmit and Early Receive
Functions
ƒ Enhanced Early Transmit Function
ƒ Receive Counter for Enhanced Early Receive
ƒ Hardware Memory Management Unit
ƒ Optional Configuration via Serial EEPROM
Interface (Jumperless)
ƒ Supports single 5V or 3.3V VCC Design
ƒ Industrial temperature range of –40°C to 85°C
ƒ Supports Mixed Voltage External PHY Designs1
ƒ Low Power CMOS Design
ƒ 100 Pin QFP and TQFP (1.0mm body Thickness)
Packages; Lead-Free Packages also available
ƒ Pin Compatible with the LAN91C92 and
LAN91C94
Bus Interface
ƒ Direct Interface to Local Bus, with No Wait States
ƒ Flexible Bus Interface
ƒ 16 Bit Data and Control Paths
ƒ Fast Access Time
1 Refer to Description of Pin Functions on Page 14 for
5V tolerant pins
Datasheet
ƒ Pipelined Data Path
ƒ Handles Block Word Transfers for any Alignment
ƒ High Performance Chained ("Back-to-Back")
Transmit and Receive
ƒ Pin Compatible with the LAN91C92 and the
LAN91C94 in Local Bus Mode
ƒ Dynamic Memory Allocation Between Transmit
and Receive
ƒ Flat Memory Structure for Low CPU Overhead
ƒ Buffered Architecture, Insensitive to Bus
Latencies (No Overruns/Underruns)
ƒ Supports Boot PROM for Diskless Local Bus
Applications
Network Interface
ƒ Integrated 10BASE-T Transceiver Functions:
- Driver and Receiver
- Link Integrity Test
- Receive Polarity Detection and Correction
ƒ Integrated AUI Interface
ƒ 10 Mb/s Manchester Encoding/Decoding and
Clock Recovery
ƒ Automatic Retransmission, Bad Packet
Rejection, and Transmit Padding
ƒ External and Internal Loopback Modes
ƒ Four Direct Driven LEDs for Status/ Diagnostics
Software Drivers
ƒ LAN9000 Drivers for Major Network Operating
Systems Utilizing Local Bus Interface
ƒ Software Drivers Compatible with the LAN91C92,
LAN91C94, LAN91C100FD (100 Mb/s), and
LAN91C110 (100 Mb/s) Controllers in Local Bus
Mode
ƒ Software Drivers Utilize Full Capability of 32 Bit
Microprocessor
SMSC DS – LAN91C96I
Page 1
DATASHEET
Rev. 03-28-07

1 page




LAN91C96I pdf
Non-PCI Single-Chip Full Duplex Ethernet Controller
Chapter 1 General Description
The LAN91C96I is a VLSI Ethernet Controller that combines Local Bus interfaces in one chip. LAN91C96I
integrates all MAC and physical layer functions, as well as the packet RAM, needed to implement a high
performance 10BASE-T (twisted pair) node. For 10BASE5 (thick coax), 10BASE2 (thin coax), and
10BASE-F (fiber) implementations, the LAN91C96I interfaces to external transceivers via the provided AUI
port. Only one additional IC is required for most applications. The LAN91C96I comes with Full Duplex
Switched Ethernet (FDSWE) support allowing the controller to provide much higher throughput. 6K bytes
of RAM is provided to support enhanced throughput and compensate for any increased system service
latencies. The controller implements multiple advanced powerdown modes including Magic Packet to
conserve power and operate more efficiently. The LAN91C96I can directly interface with the Local Bus and
deliver no-wait-state operation. For Local Bus interfaces, the LAN91C96I occupies 16 I/0 locations and no
memory space.
The same I/O space is used for Local Bus operations. Its shared memory is sequentially accessed with
40ns access times to any of its registers, including its packet memory. DMA services are not used by the
LAN91C96I, virtually decoupling network traffic from local or system bus utilization. For packet memory
management, the LAN91C96I integrates a unique hardware Memory Management Unit (MMU) with
enhanced performance and decreased software overhead when compared to ring buffer and linked list
architectures. The LAN91C96I is portable to different CPU and bus platforms due to its flexible bus
interface, flat memory structure (no pointers), and its loosely coupled buffered architecture (not sensitive to
latency).
The LAN91C96I is available in 100-pin QFP and TQFP (1.0 mm body thickness) packages; green, lead-
free packages are also available. The low profile TQFP is ideal for mobile applications such as PC Card
LAN adapters. The LAN91C96I operates with a single power supply voltage of 5V or 3.3V. The industrial
temperature range for LAN91C96I is –40°C to 85°C.
SMSC DS – LAN91C96I
Page 5
DATASHEET
Rev. 03-28-07

5 Page





LAN91C96I arduino
Non-PCI Single-Chip Full Duplex Ethernet Controller
10BASET
CABLE SIDE
DIAGNOSTIC
LEDs
AUI
Figure 3.3 – System Diagram for Local Bus with Boot Prom
SMSC DS – LAN91C96I
Page 11
DATASHEET
Rev. 03-28-07

11 Page







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