PDF KBC1100L Data sheet ( Hoja de datos )

Número de pieza	KBC1100L
Descripción	MOBILE KBC WITH SFI ADC AND DAC
Fabricantes	SMSC Corporation
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No Preview Available ! KBC1100L Mobile KBC with SFI, ADC and DAC with SMSC SentinelAlert!TM PRODUCT FEATURES Data Brief ■ 3.3V Operation with 5V Tolerant Buffers ■ ACPI 1.0b/2.0 and PC99a/PC2001 Compliant ■ LPC Interface with Clock Run Support — Serial IRQ Interface Compatible with Serialized IRQ Support for PCI Systems — 15 Direct IRQs — Three 8-Bit DMA Channels — ACPI SCI Interface — nSMI — Shadowed write only registers ■ LPC/Firmware Hub Host Flash Interface — Single Byte FWH Memory Read and FWH Memory Write Support — FWH ID Support — 16MB FWH Flash and Register Addressing, 128K Legacy BIOS Addressing — Single Byte LPC Memory Read and LPC Memory Write Support ■ Serial Peripheral Interface (SPI) — 2-pin interface with single Data In/Out Data pin — Single Ported Controller with Keeper Circuit ■ 8 MByte Shared FlashROM Interface (SFI) — 8051/Host CPU Hardware Arbitrated Interface — 0.5 - 8MB - Host System BIOS & 8051 Keyboard — 8051 64KB Code Space Accessible as Separate 32KB Pages in Flash — Low-Power Flash Access Modes — 8051-Programmable Flash Access Protection – Read/Write/No-Access Protection – Variable Bank Sizes ■ Host Flash Address Redirection for Recovery ■ Serial Flash Programming Interface ■ Two Power Planes — Low Standby Current in Sleep Mode — Intelligent Auto Power Management for Super I/O — Main powered blocks power supplied by standby power plane and controlled by power management signals ■ 3-Port ACPI Embedded Controller Interface ■ Configuration Register Set — Compatible with ISA Plug-and-Play Standard (Version 1.0a) — Four Pin Selectable Addressing Options — 8051-Programmable Base Address ■ High-Performance Embedded 8051 Keyboard and System Controller — Provides System Power Management — System Watch Dog Timer (WDT) — 8042 Style Host Interface Relocatable to 480 Different Base I/O Addresses — Supports Interrupt and Polling Access — Interrupt Accelerator — 512 Bytes Data RAM — 2 Kilobytes Scratch ROM/RAM — On-Chip Memory-Mapped Control Registers — Up to 18x8 Keyboard Scan Matrix — Two 16 Bit Timer/Counters — Eleven 8051 Interrupt Sources — Thirty-Two 8-Bit, Host/8051 Mailbox Registers — Thirty-six Maskable Hardware Wake-Up Events — Fast GATEA20 — Fast CPU_RESET — Multiple Clock Sources and Operating Frequencies up to 32MHz — IDLE and SLEEP Modes — Low Power Fail-Safe Ring Oscillator ±10% Accuracy — Hibernation Timer with programmable wake-up from 0.5ms to 128 minutes — 8051-Driven 16550A UART – 16-Byte Send/Receive FIFOs – External Baud Clock Option — Power-Fail Status Register ■ Battery Backed Resources — 32KHz clock generator — 1 Week Wakeup timer ■ One 8584-Style SMBus Controller — 8051 Host Interface Logic Allows Master or Slave Operation — Controllers are Fully Operational on Standby Power — 2 Ports per Controller SMSC KBC1100L PRODUCT PREVIEW Revision 0.4 (02-07-05) 1 page Block Diagram LPC_CLK_33 LAD [3:0] nLDRQ0 nLPCPD nLFRAME nLRESET nEC_SCI nSMI* SER_IRQ nCLKRUN PCI_CLK LPC BUS HOST CPU INTERFACE INTERRUPTS VCC1RST# PWRGD CLK_OUT CLOCKI (14.318 MHz) 32KHz_OUT XOSEL XTAL2 XTAL1 VCC0 AGND RESGEN VCC2 I/O Controls PLL CLOCK GENERATOR 32KHz Clock Week Wakeup Timer CONFIGURATION REGISTERS POWER MANAGEMENT CONTROL, ADDRESS, DATA nEC_SCI ACPI EMBEDDED CONTROLLER PM1 BLOCK 48 MHz Programmable Ring Oscillator WDT 8051 256B Direct RAM 32 MHz Programmable Ring Oscillator w/ Fail Safe MAILBOX REGISTERS 8051 SUB-BLOCK EXTERNAL CONTROL REGISTERS 512B EXTERNAL 8051 DATA RAM 2KB SCRATCH ROM POWER STATUS REGISTER SERIAL FLASH PROGRAMMING INTERFACE Battery Managment A/D, D/A & SMSC SentinelAlert! HOST FLASH INTERFACE HARDWARE READ ARBITER AND FLASH ACCESS CONTROL 8051 MCU FLASH INTERFACE 8051TX* 8051RX* DBG_CLK* MSDAT MSCLK SA_GPIO[1:0] HW_PROTECT# VCC1 POWERED VCC0 POWERED Figure 1 KBC1100L Block Diagram SHARED FLASH INTERFACE FD[7:0] FA[22:0] nFRD nFWR nFCS FPGM SERIAL PERIPHERAL INTERFACE IN GENERAL OUT PURPOSE I/O I/O INTERFACE I/O I/O LED DRIVER 18 x 8 KEYBOARD INTERFACE PS/2 PORTS Specifc Wake SPCLK* SPDOUT* SPDIN* IN OUT GPIO SGPIO LGPIO nBAT_LED, nPWR_LED KSI[0:7] KS0[0:13], KS0[14:17]* KBRST, A20M IMCLK* IMDAT* KCLK* KDAT* ACCESS BUS I2C1A_DATA, AB1A_CLK I2C1B_DATA, AB1B_CLK PWM FAN TACHOMETER 16-BIT COUNTER/ TIMER INTERFACE PWM[3:0]* FAN_TACH[3:1]* TIN[7:4]* * Multifunction Pin 5 Page

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