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PDF FDC37M81x Data sheet ( Hoja de datos )

Número de pieza FDC37M81x
Descripción PC98/99 Compliant Enhanced Super I/O Controller
Fabricantes SMSC Corporation 
Logotipo SMSC Corporation Logotipo



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FDC37M81x
PC98/99 Compliant Enhanced Super I/O
Controller with Keyboard/Mouse Wake-Up
FEATURES
5 Volt Operation
PC98, PC99 Compliant
ISA Plug-and-Play Compatible Register Set
Intelligent Auto Power Management
- Shadowed Write-Only Registers
- Programmable Wake-up Event
Interface
System Management Interrupt, Watchdog
Timer
2.88MB Super I/O Floppy Disk Controller
- Licensed CMOS 765B Floppy Disk
Controller
- Software and Register Compatible
with SMSC's Proprietary 82077AA
Compatible Core
- Supports One Floppy Drive
- Configurable Open Drain/Push-Pull
Output Drivers
- Supports Vertical Recording Format
- 16-Byte Data FIFO
- 100% IBM Compatibility
- Detects All Overrun and Underrun
Conditions
- Sophisticated Power Control Circuitry
(PCC) Including Multiple Powerdown
Modes for Reduced Power
Consumption
- DMA Enable Logic
- Data Rate and Drive Control Registers
- 480 Address, Up to 15 IRQ and
Three DMA Options
Floppy Disk Available on Parallel Port Pins
Enhanced Digital Data Separator
- 2 Mbps, 1 Mbps, 500 Kbps, 300
Kbps, 250 Kbps Data Rates
- Programmable Precompensation
Modes
Keyboard Controller
- 8042 Software Compatible
- 8 Bit Microcomputer
- 2k Bytes of Program ROM
- 256 Bytes of Data RAM
- Four Open Drain Outputs Dedicated
for Keyboard/Mouse Interface
- Asynchronous Access to Two Data
Registers and One Status Register
- Supports Interrupt and Polling Access
- 8 Bit Counter Timer
- Port 92 Support
- Fast Gate A20 and KRESET Outputs
- 8042 P12, P16 and P17 Outputs
Serial Ports
- Two Full Function Serial Ports
- High Speed NS16C550A Compatible
UARTs with Send/Receive 16-Byte
FIFOs
- Supports 230k and 460k Baud
Programmable Baud Rate Generator
Modem Control Circuitry
- 480 Address and 15 IRQ Options
- IrDA 1.0, HP-SIR, ASK IR Support

1 page




FDC37M81x pdf
PIN CONFIGURATION
DRVDEN0
DRVDEN1
nMTR0
nIO_PME
nDS0
P17
VSS
nDIR
nSTEP
nWDATA
nWGATE
nHDSEL
nINDEX
nTRK0
nWPRT
nRDATA
nDSKCHG
VTR
CLOCKI
nCS/SA11
SA10
SA9
SA8
SA7
SA6
SA5
SA4
SA3
SA2
SA1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
FDC37M81x
100 PIN QFP
80 PE
79 SLCT
78 nERROR
77 nACK
76 VSS
75 PD0
74 PD1
73 PD2
72 PD3
71 PD4
70 PD5
69 PD6
68 PD7
67 nINIT
66 nSLCTIN
65 VCC
64 KBRST
63 A20M
62 IRTX2
61 IRRX2
60 VSS
59 KDAT
58 KCLK
57 MDAT
56 MCLK
55 IOCHRDY
54 TC
53 VCC
52 DRQ3/P12
51 nDACK3/P16
5

5 Page





FDC37M81x arduino
SER_IRQ
PCI_CLK
nIOR
nIOW
AEN
*
SA[0:12] (nCS)
*
SA[13-15]
SD[O:7]
*
DRQ[1:3]
*
nDACK[1:3]
TC
RESET_DRV
IOCHRDY
nPME
SMI
PME
WDT
SERIAL
IRQ
DATA BUS
ADDRESS BUS
MULTI-MODE
PARALLEL
PORT/FDC
MUX
PD0-7
BUSY, SLCT, PE,
nERROR, nACK
nSTB, nSLCTIN,
nINIT, nALF
HOST
CPU
INTERFACE
VTR Vcc Vss
CONFIGURATION
REGISTERS
CONTROL BUS
16C550
COMPATIBLE
SERIAL
PORT 1
TXD1, nCTS1, nRTS1
RXD1
nDSR1, nDCD1, nRI1, nDTR1
CLOCK
GEN
WDATA
WCLOCK
SMSC
PROPRIETARY
82077
COMPATIBLE
VERTICAL
FLOPPYDISK
CONTROLLER
CORE
RCLOCK
DIGITAL
DATA
SEPARATOR
WITH WRITE
PRECOM-
PENSATION
RDATA
16C550
COMPATIBLE
SERIAL
PORT 2 WITH
INFRARED
IRRX, IRTX
TXD2(IRTX), nCTS2, nRTS2*
RXD2(IRRX)*
nDSR2, nDCD2, nRI2, nDTR2*
8042
KCLK
KDATA
MCLK
MDATA
GATEA20, KRESET
P12*, P16*
nINDEX DENSEL nDS0
CLOCKI
14MHz
nTRK0 nDIR nMTR0
nDSKCHG
nSTEP
nWDATA nRDATA
DRVDEN0
nWRPRT nHDSEL DRVDEN1*
nWGATE
*Denotes Multifunction Pins
FIGURE 1 - FDC37M81x BLOCK DIAGRAM
11

11 Page







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