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PDF HI5800 Data sheet ( Hoja de datos )

Número de pieza HI5800
Descripción Sampling A/D Converter
Fabricantes Intersil Corporation 
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®
Data Sheet
HI5800
July 2000
File Number 2938.2
12-Bit, 3MSPS, Sampling A/D Converter
The HI5800 is a monolithic, 12-bit, sampling Analog-to-
Digital Converter fabricated in the HBC10 BiCMOS process.
It is a complete subsystem containing a sample and hold
amplifier, voltage reference, two-step subranging A/D, error
correction, control logic, and timing generator. The HI5800 is
designed for high speed applications where wide bandwidth,
accuracy and low distortion are essential.
Related Literature
• Technical Brief TB363 “Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
Ordering Information
PART
NUMBER
HI5800BID
HI5800JCD
HI5800KCD
HI5800-EV
LINEARITY
TEMP.
RANGE
(oC)
PACKAGE
PKG.
NO.
±1 LSB -40 to 85 40 Ld SBDIP D40.6
±2 LSB
±1 LSB
0 to 70 40 Ld SBDIP D40.6
25 Evaluation Board
Features
• Throughput Rate . . . . . . . . . . . . . . . . . . . . . . . . . . 3MSPS
• 12-Bit, No Missing Codes Over Temperature
• Integral Linearity Error . . . . . . . . . . . . . . . . . . . . . 1.0 LSB
• Buffered Sample and Hold Amplifier
• Precision Voltage Reference
• Input Signal Range. . . . . . . . . . . . . . . . . . . . . . . . . . ±2.5V
• 20MHz Input BW Allows Sampling Beyond Nyquist
• Zero Latency/No Pipeline Delay
Applications
• High Speed Data Acquisition Systems
• Medical Imaging
• Radar Signal Analysis
• Document and Film Scanners
• Vibration/Waveform Spectrum Analysis
• Digital Servo Control
Pinout
HI5800
(SBDIP)
TOP VIEW
REFIN 1
ROADJ 2
RGADJ
AVCC
REFOUT
3
4
5
VIN 6
AGND 7
ADJ+ 8
ADJ- 9
AVEE 10
AVCC 11
AGND 12
AVEE 13
A0 14
CS 15
OE 16
CONV 17
DVEE 18
DGND 19
DVCC 20
40 IRQ
39 OVF
38 AVCC
37 D11 (MSB)
36 D10
35 D9
34 D8
33 DVCC
32 DGND
31 AGND
30 AVEE
29 D7
28 D6
27 D5
26 D4
25 D3
24 D2
23 D1
22 D0 (LSB)
21 AVCC
4-1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2002. All Rights Reserved

1 page




HI5800 pdf
HI5800
Electrical Specifications AVCC = +5V, DVCC = +5V, AVEE = -5V, DVEE = -5V; Internal Reference Used,
Unless Otherwise Specified (Continued)
HI5800JCD
0oC TO 70oC
HI5800KCD, HI5800BID
0oC TO 70oC
-40oC TO 85oC
PARAMETER
TEST CONDITIONS
MIN TYP MAX MIN
Data Access from OE Low, t12
(Note 3)
LSB, Nibble Delay from A0 High, t13 (Note 3)
MSB Delay from A0 Low, t14
(Note 3)
CS to Float Delay, t15
(Note 3)
Minimum CS Pulse, t16
(Notes 3, 5)
CS to Data Valid Delay, t17
(Note 3)
Output Fall 2 Time, tf
(Note 3)
Output Rise Time, tr
(Note 3)
POWER SUPPLY CHARACTERISTICS
10 18 25 10
- 10 20 -
- 14 20 -
10 18 25 10
15 -
- 15
10 18 25 10
- 5 20 -
- 5 20 -
IVCC
IVEE
IDVCC
IDVEE
Power Dissipation
- 170 220 -
- 150 190 -
- 24 40 -
- 25 -
- 1.7 2.2 -
PSRR
NOTES:
VCC, VEE ±5%
- 0.01 -
-
2. Dissipation rating assumes device is mounted with all leads soldered to printed circuit board.
3. Parameter guaranteed by design or characterization and not production tested.
4. Recommended pulse width for CONV is 60ns.
5. Recommended minimum pulse width is 25ns.
6. This is the additional current available from the REFOUT pin with the REFOUT pin driving the REFIN pin.
7. The A0 pin VIH at -40oC may exceed 2.0V by up to 0.4V at initial power up.
8. Excludes error due to internal reference temperature drift.
TYP
18
10
14
18
-
18
5
5
MAX
25
20
20
25
-
25
20
20
170
150
24
2
1.7
±0.01
220
190
40
5
2.2
-
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
mA
mA
mA
mA
W
%/%
Timing Diagrams
CONV
t1
CS
t16
t7
IRQ ACQUIRE N
N CONVERSION
t8
DATA VALID
N - 1 DATA
N DATA
AO
OE
D0 - D11, OVF
4-5
t15
N DATA
t12
FIGURE 1. SINGLE SHOT TIMING
t17

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HI5800 arduino
HI5800
interfaced to any type of op amp without a requirement for a
high drive capability. Adequate precautions should be taken
while driving the input from high voltage output op amps to
ensure that the analog input pin is not overdriven above the
specified maximum limits. For a +2.5V reference, the analog
input range is ±2.5V. This input range scales with the value
of the external reference voltage if the internal reference is
not used. For best performance, the analog ground pin next
to the analog input should be utilized for signal return.
Figures 16 and 17 illustrate the use of an input buffer as a
level shifter to convert a unipolar signal to the bipolar input
used by the HI5800. Figure 16 is an example of a non-
inverting buffer that takes a 0 to 2.5V input and shifts it to
±2.5V. The gain can be calculated from:
VOUT = 1 + (---R-----1-R--|--|-2-R-----3----) × VIN R-----1---R--+---1--R-----3-- × VOFFSET
R1|| R3 = R----R-1---1--+--R---R--3---3--
R2
1k
VOFFSET
R3
2k
+15V
-
R1
2k
+
VIN -15V
0.1
HA2841
VOUT
HI5800
VIN
0.1
FIGURE 16. NON-INVERTING BUFFER
Figure 17 is an example of an inverting buffer that level shifts
a 0V to 5V input to ±2.5V. Its gain can be calculated from:
VOUT = (R2 R1) × VIN (R2 R3) × VOFFSET.
VIN
VOFFSET
R1
1k
R3
2k
R2
1k
+15V
- 0.1
+ HA2841
VOUT
HI5800
VIN
-15V
0.1
FIGURE 17. INVERTING BUFFER
Note that the correct op amp must be chosen in order to not
degrade the overall dynamic performance of the circuit.
Recommended op amps are called out in the figures.
Voltage Reference, REFOUT
The HI5800 has a curvature corrected internal band-gap
reference generator with a buffer amplifier capable of driving up
to 15mA. The band-gap and amplifier are trimmed to give
+2.50V. When connected to the reference input pin REFIN, the
reference is capable of driving up to 2mA externally. Further
loading may degrade the performance of the output voltage. It
is recommended that the output of the reference be decoupled
with good quality capacitors to reduce the high frequency noise.
Reference Input, REFIN
The converter requires a voltage reference connected to the
REFIN pin. This can be the above internal reference or it can
be an external reference. It is recommended that adequate
high frequency decoupling is provided at the reference input
pin in order to minimize overall converter noise.
A user trying to provide an external reference to a HI5800 is
faced with two problems. First, the drift of the reference over
temperature must be very low. Second, it must be capable of
driving the 200input impedance seen at the REFIN pin of
the HI5800. Figure 18 is a recommended circuit for doing
this that is capable of 2ppm/oC drift over temperature.
+1105µV+
0.1
VOUT VFB
REF101 RA
C
RB
10
k
HA5177 HA5002
+15 +15
+
-
-15
10
10µ +
-15
LOW TC RESISTOR
FIGURE 18. EXTERNAL REFERENCE
HI5800
REFIN
0.1
Supply and Ground Considerations
The HI5800 has separate analog and digital supply and
ground pins to help keep digital noise out of the analog signal
path. For the best performance, the part should be mounted
on a board that provides separate low impedance planes for
the analog and digital supplies and grounds. Only connect the
two grounds together at one place preferably as close as
possible to the part. The supplies should be driven by clean
linear regulated supplies. The board should also have good
high frequency decoupling capacitors mounted as close as
possible to the HI5800.
If the part is powered off a single supply then the analog
supply and ground pins should be isolated by ferrite beads
from the digital supply and ground pins.
Also, it is recommended that the turn-on power supply
sequencing be such that the analog positive supply, AICC,
come up first, followed by the remaining supplies.
Refer to the Application Note “Using Intersil High Speed A/D
Converters” (AN9214) for additional suggestions to consider
when using the HI5800.
Error Adjustments
For most applications the accuracy of the HI5800 is sufficient
without any adjustments. In applications where accuracy is of
utmost importance three external adjustments are possible:
S/H offset, D/A offset and D/A gain. Figure 19 illustrates the use
of external potentiometers to reduce the HI5800 errors to zero.
The D/A offset (ROADJ) and S/H offset (ADJ+ and ADJ-)
trims adjust the voltage offset of the transfer curve while the
4-11

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