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PDF EIB-TP-UART-IC Data sheet ( Hoja de datos )

Número de pieza EIB-TP-UART-IC
Descripción TP-UART-IC
Fabricantes Siemens Semiconductor 
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TECHNICAL DATA
EIB-TP-UART-IC
VB -
Tx0
Rx IN
MODE 0
MODE 1
TEST MODE
X1
X2
TSTOUT
RxD
11
12
13
14
15
16
17
18
19
20
Features
10 VB + Signaling for standard UART (LSB-First,
9 VSP
Idle is 1)
8 CSA Baud rate 9600 or 19200 baud for the
communication:
7 VCC TP - UART <--> Host - Controller
6 DIV Direct coupling to host controller (TxD,
5 SAVE RxD), or via optical couplers (optional)
4 TSTIN 2 - wire protocol with software handshake
3 VIF Buffering of send frames
2 RESn
No critical timing during transmission
1 TxD
64 Byte telegram buffer
Operating temperature range:
-25°C to 85°C
Supervision of EIB bus voltage
GENERAL DESCRIPTION
The TP - UART - IC (Twisted Pair - Universal Asynchronous Receive Transmit - IC) is a
transceiver which supports the connection of microcontrollers of sensors, actuators, or other
applications to the EIB (European - Installation - Bus).
This module supports every transmit- and receive - function and also the high ohmic decoupling
of energy from bus line. It generates further a stabilized 3.3V or 5V supply to use by a host
controller. Up to 256 subscribers can be connected to one bus line.
An UART interface is realized for communication with a host controller. The coupling can be
realized directly or via optical couplers.
The TP - UART - IC consists of two main parts: the digital part (UART - Interface) and the analog
part ( analog circuit part).
The reproduction, transmission or use of this document or it‘s contents is not permitted without express written authority. All
rights, including right created by patent grant or registration of a utility model or design, are reserved. Technical changes
reserved.
25.15.10.41.33a
25.10.01
page 1

1 page




EIB-TP-UART-IC pdf
TP-UART-IC
1.2.4 Supply Pin VCC (Pin 7)
The pin VCC delivers the internal generated voltage supply to external loads. An external
short-circuit from the VCC pin to GND will not cause a destruction of the ASIC.
Symbol Parameter
Min Max Unit Note
VVCC
Voltage supply (generated by the ASIC or external
source in case of digital test modes)
4.75 5.25 V
1)
CVCC
IVCC
External storage capacitor
External load at VCC
6,8 10 µF +/-20 %
10 mA
2)
1) VB+ 11 V
2) If there is a current leap ILeap with a slope greater than 1 mA/ms the following formulas have to be
applied:
IStat is the static current, i.e. slope not greater than 1 mA/ms
IStat 3 mA;
ILeap (3 mA – IStat) + 5 mA
3mA < IStat 5 mA;
ILeap 8 mA - IStat
IStat > 5 mA;
ILeap 3 mA
1.2.5 Receive Pin RxIN (Pin 13)
The Receive Pin RxIN is coupled to the EIB bus by an external capacitor.
Symbol Parameter
CREC external coupling capacitor
1)external capacitor 47 nF/50V ± 5%
Min
44.5
Max
49.5
Unit Note
nF typ.47 nF1)
1.2.6 Transmit Pin TxO (Pin 12)
The transmit pin is connected to EIB via external resistor of typ. 68/1W (see Typical
Application Circuits).
Symbol Parameter
VTRANS transmit voltage
1) related to VB+
Min Max Unit Note
-6 -9 V 1)
1.2.7 Supply Pin VIF (Pin 3)
The Pin VIF is used as supply voltage for the pins TxD, RxD, RESn, TSTOUT, X1, X2 and
determines their high input or output level.
Symbol Parameter
VIF external supply voltage for interface
CVIF external storage capacitor
1) Typical supply voltages: 3.3 V or 5 V
2) Recommended
Min Max Unit Note
3
5.5 V
1)
10 nF 2)
The reproduction, transmission or use of this document or it‘s contents is not permitted without express written authority. All
rights, including right created by patent grant or registration of a utility model or design, are reserved. Technical changes
reserved.
25.15.10.41.33a
25.10.01
page 5

5 Page





EIB-TP-UART-IC arduino
TP-UART-IC
The UART-interface works with a clock frequency of 307,2 kHz, if it is chosen 9.6 kbaud (32
sample spots per bit), or 614,4 kHz, if it is chosen 19.2 kbaud (32 sample spots per bit).
3.2.2 Resetbehavior
After connecting the operating voltage the TP-UART-IC generates an active reset
(level 0 V) at pin RESn. This is valid for all modes. If Normal Mode is activated the following
will happen at the UART-interface.
TxD will be 0 as long as there was no bus signal on the EIB for 40 Tbit (1 Tbit = 1/9600 s;
Attention: The bittime of RxD/TxD depends on the adjusted baudrate at the UART-interface,
for example 1 Tbit or 0,5 Tbit). This results in a complete time of 40 Tbit + 12 Tbit = 5,42 ms.
Then TxD changes for 1 Tbit to 1 and following the service TPUART-Reset.Indication is
transmitted. This signal behavior on TxD appears after each reset.
3.2.3 UART-Protocol Definition
The protocol between TP-UART-IC and the application controller is a two wire protocol with
software handshake. Each data byte transmitted to the TP-UART-IC is started with a control
byte. Each data byte received on the EIB is transparently transmitted through the TP-UART-
IC and is therefore started with the EIB control field. Additional Information from the TP-
UART-IC is transmitted with an ESC code on the EIB control field. The host controller which
is connected to the TP-UART-IC needs to detect a receive time-out of 2 to 2,5 ms to detect
an end of Packet.
3.2.3.1 Services to UART
The following Services are supported from the TP-UART-IC.
U_Reset.request
U_State.request
U_Activate Busmonitor
U_AckInformation (Nack, Busy, Addressed)
U_L_DataStart
+ CTRL-Byte
U_L_DataContinue (index)
+ Data-Byte
U_L_DataEnd
+ Checksum
U_PollingState (Slotnumber)
+ PollAddrHigh + PollAddrLow + State
UART-Control Field Servicename
76543210
0 0 0 0 0 0 0 1 U_Reset.request
0 0 0 0 0 0 1 0 U_State.request
0 0 0 0 0 1 0 1 U_ActivateBusmon
0 0 0 1 0 X X X U_AckInformation
1 0 0 0 0 0 0 0 U_L_DataStart
1 0 i i i i i i U_L_DataContinue
0 1 l l l l l l U_L_DataEnd
1 1 1 0 s s s s U_PollingState
Hexadecimal
01
02
05
10 - 17
80
81 - BE
47 - 7F
E0 - EF
xxx: Nack,Busy,Addressed
i = Index
l = last index + 1
s = Slotnumber
1 .. 62
7 .. 63
0 .. 14
The reproduction, transmission or use of this document or it‘s contents is not permitted without express written authority. All
rights, including right created by patent grant or registration of a utility model or design, are reserved. Technical changes
reserved.
25.15.10.41.33a
25.10.01
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