FIN24A Datasheet PDF - Fairchild Semiconductor
| Part Number | FIN24A | |
| Description | Low Voltage 24-Bit Bi-Directional Serializer/Deserializer | |
| Manufacturers | Fairchild Semiconductor | |
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There is a preview and FIN24A download ( pdf file ) link at the bottom of this page. Total 20 Pages | ||
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Preliminary
April 2005
Revised May 2005
FIN24A
PSerDes
Low Voltage 24-Bit Bi-Directional Serializer/Deserializer
with Multiple Frequency Ranges (Preliminary)
General Description
Features
The FIN24A allows for a pair of SerDes to interleave data s Low power consumption
from two different data sources going opposite directions or
standard bi-directional interface operation. The bi-direc-
tional data flow is controlled through use of a direction
(DIRI) control pin. The devices can be configured to oper-
s Low power standards based LVDS differential interface
s LVCMOS parallel I/O interface
• 2 mA source/sink current
ate in a unidirectional mode only by hardwiring the DIRI
• Over-voltage tolerant control signals
pin. An internal PLL generates the required bit clock fre-
quency for transfer across the serial link. The FIN24A sup-
ports multiple input frequency ranges which are selected
by the S1 and S2 control pins. Options exist for dual or sin-
gle PLL operation dependent upon system operational
parameters. The device has been designed for low power
s I/O Power Supply range between 1.65V and 3.6V
s Analog Power Supply range of 2.775V r 5%
s Multi-Mode operation allows for a single device to
operate as Serializer or Deserializer
s Internal PLL with no external components
operation and utilizes Fairchild Low Power LVDS interface. s Standby Power-Down mode support
The device also supports an ultra low power Power-Down
mode for conserving power in battery operated applica-
tions.
s Small footprint 40-terminal MLP packaging
s Built in differential termination
s Supports external CKREF frequencies between 2MHz
www.DataSheaetn4Ud.c3o0mMHz
s Serialized data rate up to 780Mb/s
Ordering Code:
Order Number Package Number
Package Description
FIN24AGFX
(Preliminary)
BGA042A
Pb-Free 42-Ball Ultra Small Scale Ball Grid Array (USS-BGA), JEDEC MO-195,
3.5mm Wide
FIN24AMLX
MLP040A
Pb-Free 40-Terminal Molded Leadless Package (MLP), Quad, JEDEC MO-220, 6mm
Square
Pb-Free package per JEDEC J-STD-020B.
BGX and MLP packages available in Tape and Reel only.
PSerDes¥ is a trademark of Fairchild Semiconductor Corporation.
© 2005 Fairchild Semiconductor Corporation DS500888
www.fairchildsemi.com
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Serializer Operation Mode (Continued)
Preliminary
FIGURE 1. Serializer Timing Diagram (CKREF equals STROBE)
FIGURE 2. Serializer Timing Diagram (CKREF does not equal STROBE)
FIGURE 3. Serializer Timing Diagram Using Provided Bit Clock (No CKREF)
5 www.fairchildsemi.com
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Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for FIN24A electronic component. |
| Information | Total 20 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ FIN24A.PDF Datasheet ] | |
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Featured Datasheets
| Part Number | Description | MFRS |
| FIN24A | The function is Low Voltage 24-Bit Bi-Directional Serializer/Deserializer. Fairchild Semiconductor | |
| FIN24AC | The function is USerDesTM 22-Bit Bi-Directional Serializer/Deserializer. Fairchild Semiconductor | |
| FIN24C | The function is uSerDes Low Voltage 24-Bit Bi-Directional Serializer/Deserializer. Fairchild Semiconductor | |
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