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PDF NSBA1xxxDXV6T1 Data sheet ( Hoja de datos )
| Número de pieza | NSBA1xxxDXV6T1 | |
| Descripción | (NSBA114EDXV6T5 Series) Dual Bias Resistor Transistors | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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NSBA114EDXV6T1,
NSBA114EDXV6T5 SERIES
Preferred Devices
Dual Bias Resistor
Transistors
PNP Silicon Surface Mount Transistors
with Monolithic Bias Resistor Network
The BRT (Bias Resistor Transistor) contains a single transistor with
a monolithic bias network consisting of two resistors; a series base
resistor and a base−emitter resistor. These digital transistors are
designed to replace a single device and its external resistor bias
network. The BRT eliminates these individual components by
integrating them into a single device. In the NSBA114EDXV6T1
series, two BRT devices are housed in the SOT−563 package which is
ideal for low−power surface mount applications where board space is
at a premium.
Features
• Simplifies Circuit Design
• Reduces Board Space
• Reduces Component Count
• These are Pb−Free Devices
MAXIMUM RATINGS
www.DataSheet4U.com
(TA = 25°C unless otherwise noted, common for Q1 and Q2)
Rating
Symbol Value
Unit
Collector-Base Voltage
VCBO −50 Vdc
Collector-Emitter Voltage
VCEO
−50
Vdc
Collector Current
IC
−100
mAdc
THERMAL CHARACTERISTICS
Characteristic
(One Junction Heated)
Symbol Max
Unit
Total Device Dissipation @ TA = 25°C PD 357 mW
Derate above 25°C (Note 1)
2.9 mW/°C
Thermal Resistance, Junction-to-Ambient RqJA
(Note 1)
350 °C/W
Characteristic
(Both Junctions Heated)
Total Device Dissipation @ TA = 25°C
Derate above 25°C (Note 1)
Symbol
PD
Max
500
4.0
Unit
mW
mW/°C
Thermal Resistance, Junction-to-Ambient RqJA
(Note 1)
250 °C/W
Junction and Storage Temperature
Range
TJ, Tstg
−55 to
+150
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. FR−4 @ Minimum Pad
© Semiconductor Components Industries, LLC, 2006
April, 2006 − Rev. 6
1
http://onsemi.com
(3) (2) (1)
R1 R2
Q1
R2 R1
Q2
(4) (5)
(6)
SOT−563
CASE 463A
PLASTIC
1 STYLE 1
MARKING DIAGRAM
xx M G
G
xx = Device Code
(Refer to page 2)
M = Date Code
G = Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Device
Package
Shipping†
NSBA1xxxDXV6T1 SOT−563* 4000/Tape & Reel
NSBA1xxxDXV6T1G SOT−563* 4000/Tape & Reel
NSBA1xxxDXV6T5 SOT−563* 8000/Tape & Reel
NSBA1xxxDXV6T5G SOT−563* 8000/Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
**This package is inherently Pb−Free.
DEVICE MARKING INFORMATION
See specific marking information in the device marking table
on page 2 of this data sheet.
Preferred devices are recommended choices for future use
and best overall value.
Publication Order Number:
NSBA114EDXV6/D
1 page  
NSBA114EDXV6T1, NSBA114EDXV6T5 SERIES
TYPICAL ELECTRICAL CHARACTERISTICS — NSBA124EDXV6T1
10
IC/IB = 10
1000
VCE = 10 V
1 25°C
TA = −25°C
100
75°C
0.1
TA = 75°C
25°C
−25°C
0.01
0
20 40
IC, COLLECTOR CURRENT (mA)
Figure 7. VCE(sat) versus IC
10
50 1
10
IC, COLLECTOR CURRENT (mA)
Figure 8. DC Current Gain
100
4 100
f = 1 MHz
75°C 25°C
3
lE = 0 V
TA = 25°C
10
TA = −25°C
1
2
0.1
1
0.01
VO = 5 V
0
0 10
20
30
40 50 0.001 0 1 2 3 4 5 6 7 8 9 10
VR, REVERSE BIAS VOLTAGE (VOLTS)
Vin, INPUT VOLTAGE (VOLTS)
Figure 9. Output Capacitance
Figure 10. Output Current versus Input Voltage
100
VO = 0.2 V
TA = −25°C
10 25°C
75°C
1
0.1
0
10 20 30 40
IC, COLLECTOR CURRENT (mA)
50
Figure 11. Input Voltage versus Output Current
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5
5 Page 
NSBA114EDXV6T1, NSBA114EDXV6T5 SERIES
PACKAGE DIMENSIONS
SOT−563, 6 LEAD
CASE 463A−01
ISSUE F
D
−X−
A
L
654
12 3
E
−Y−
HE
b 65 PL
e 0.08 (0.003) M X Y
C
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETERS
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE MATERIAL.
MILLIMETERS
INCHES
DIM MIN NOM MAX MIN NOM MAX
A 0.50 0.55 0.60 0.020 0.021 0.023
b 0.17 0.22 0.27 0.007 0.009 0.011
C 0.08 0.12 0.18 0.003 0.005 0.007
D 1.50 1.60 1.70 0.059 0.062 0.066
E 1.10 1.20 1.30 0.043 0.047 0.051
e 0.5 BSC
0.02 BSC
L 0.10 0.20 0.30 0.004 0.008 0.012
HE 1.50 1.60 1.70 0.059 0.062 0.066
STYLE 1:
PIN 1. EMITTER 1
2. BASE 1
3. COLLECTOR 2
4. EMITTER 2
5. BASE 2
6. COLLECTOR 1
SOLDERING FOOTPRINT*
0.3
0.0118
1.35
0.0531
1.0
0.0394
0.45
0.0177
0.5 0.5
0.0197 0.0197
ǒ ǓSCALE 20:1
mm
inches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
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Phone: 480−829−7710 or 800−344−3860 Toll Free USA/Canada
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Email: [email protected]
N. American Technical Support: 800−282−9855 Toll Free
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Japan: ON Semiconductor, Japan Customer Focus Center
2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051
Phone: 81−3−5773−3850
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11
ON Semiconductor Website: http://onsemi.com
Order Literature: http://www.onsemi.com/litorder
For additional information, please contact your
local Sales Representative.
NSBA114EDXV6/D
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| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet NSBA1xxxDXV6T1.PDF ] | |
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