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Número de pieza | NCP1606 | |
Descripción | Cost Effective Power Factor Controller | |
Fabricantes | ON Semiconductor | |
Logotipo | ||
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No Preview Available ! NCP1606
Cost Effective Power Factor
Controller
The NCP1606 is an active power factor controller specifically
designed for use as a pre−converter in electronic ballasts, ac−dc
adapters and other medium power off line converters (typically up to
300 W). It embeds a Critical Conduction Mode (CRM) scheme that
substantially exhibits unity power factor across a wide range of input
voltages and power levels. Housed in a DIP8 or SOIC−8 package, the
NCP1606 minimizes the number of external components. Its
integration of comprehensive safety protection features makes it an
excellent driver for rugged PFC stages.
General Features
• “Unity” Power Factor
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8
1
SO−8
D SUFFIX
CASE 751
MARKING
DIAGRAMS
8
1606x
ALYW
G
1
• No Need for Input Voltage Sensing
• Latching PWM for Cycle by Cycle On Time Control (Voltage Mode)
• High Precision Voltage Reference (±1.6% over temperature ranges)
• Very Low Startup Current Consumption (≤ 40 mA)
• Low Typical Operating Current (2.1 mA)
• −500 mA / +800 mA Totem Pole Gate Driver
• Undervoltage Lockout with Hysteresis
• Pin to Pin Compatible with Industry Standards
Safety Features
• Programmable Overvoltage Protection
• Protection against Open Loop (Undervoltage Protection)
• Accurate and Programmable On Time Limitation
• Overcurrent Limitation
Typical Applications
• Electronic Light Ballast
8
1
DIP−8
P SUFFIX
CASE 626
NCP1606x
AWL
YYWWG
x = A or B
A = Assembly Location
L, WL = Wafer Lot
Y, YY = Year
W, WW = Work Week
G or G = Pb−Free Package
PIN CONNECTION
Feedback
Control
Ct
CS
(Top View)
VCC
Drive
Ground
ZCD/STDWN
• AC Adapters, TVs, Monitors
• All Off Line Appliances Requiring Power Factor Correction
LBOOST
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 20 of this data sheet.
DBOOST
VOUT
AC Line
EMI
Filter
RZCD
+
Cin
ROUT1
Ccomp
ROUT2
Ct
1
2
3
4
NCP1606
FB VCC
Ctrl DRV
Ct GND
CS ZCD
VCC
8
7
6
5
LOAD
(Ballast,
SMPS, etc.)
+
CBULK
RSENSE
Figure 1. Typical Application
© Semiconductor Components Industries, LLC, 2010
June, 2010 − Rev. 8
1
Publication Order Number:
NCP1606/D
1 page NCP1606
ELECTRICAL CHARACTERISTICS
(Unless otherwise specified: For typical values, TJ = 25°C. For min/max values, TJ = −40°C to +125°C, VCC = 12 V, FB = 2.4 V, CDRV =
1 nF, Ct = 1 nF, CS = 0 V, Control = open, ZCD = open)
Symbol
Rating
Min Typ Max Unit
VCL(NEG) Negative Active Clamp Voltage @ IZCD = −2.5 mA
ICL(NEG)
Current Capability of the Negative Active Clamp:
in normal mode (VZCD = 300 mV)
in shutdown mode (VZCD = 100 mV)
VSDL
Shutdown Threshold (VZCD falling)
VSDH
Enable Threshold (VZCD rising)
VSDHYS Shutdown Comparator Hysteresis
tZCD Zero current detection propagation delay
tSYNC
Minimum detectable ZCD pulse width
tSTART
Drive off restart timer
RAMP CONTROL
ICHARGE Charge Current (VCT = 0 V)
−25°C < TJ < +125°C
−40°C < TJ < +125°C
tCT(discharge) Time to discharge a 1 nF Ct capacitor from VCT = 3.4 V to 100 mV.
VCTMAX Maximum Ct level before DRV switches off
−25°C < TJ < +125°C
−40°C < TJ < +125°C
tPWM
Propagation delay of the PWM comparator
OVER AND UNDERVOLTAGE PROTECTION
IOVP
Dynamic overvoltage protection (OVP) triggering current:
NCP1606A
NCP1606B @ TJ = 25°C
NCP1606B @ TJ = −40°C to +125°C
IOVP(HYS)
Hysteresis of the dynamic OVP current before the OVP latch is released:
NCP1606A
NCP1606B
0.45
2.5
35
150
−
−
−
−
75
243
235
−
2.9
2.9
−
34
9.0
8.7
−
−
0.6
3.7
70
200
290
90
100
70
180
270
270
−
3.2
3.2
150
40
10.4
−
30
8.5
0.75 V
5.0 mA
100 mA
250 mV
350 mV
− mV
170 ns
− ns
300 ms
297 mA
297
100 ns
3.3 V
3.4
220 ns
mA
45
11.8
12.1
mA
−
−
VOVP
Static OVP Threshold Voltage
VEAL +
100 mV
V
VUVP
Undervoltage protection (UVP) threshold voltage
GATE DRIVE SECTION
ROH
ROL
Gate Drive Resistance:
ROH @ ISOURCE = 100 mA
ROH @ ISOURCE = 20 mA
ROL @ ISINK = 100 mA
ROL @ ISINK = 20 mA
trise Drive voltage rise time from 10% VCC to 90% VCC with CDRV = 1 nF and VCC = 12 V.
tfall Drive voltage fall time from 90% VCC to 10% VCC with CDRV = 1 nF and VCC = 12 V.
VOUT(start) Driver output voltage at VCC = VCC(on) − 200 mV and Isink = 10 mA
3. Parameter values are valid for transient conditions only.
4. Parameter characterized and guaranteed by design, but not tested in production.
0.25
−
−
−
−
−
−
−
0.3
12
12
6
6
30
25
−
0.4 V
W
18
18
10
10
80 ns
70 ns
0.2 V
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5 Page NCP1606
When the switch is closed, the inductor current increases
linearly to its peak value. When the switch opens, the
inductor current linearly decreases to zero. At this point,
the drain voltage of the switch (Vd) is essentially floating
and begins to drop. If the next switching cycle does not
start, then the voltage will ring with a dampened frequency
around Vin. A simple derivation of equations (such as found
in AND8123), leads to the result that good power factor
correction in CRM operation is achieved when the on time
is constant across an ac cycle and is equal to:
ton
+
2 @ POUT @ L
h @ VacRMS 2
(eq. 1)
A simple plot of this switching over an ac line cycle is
illustrated in Figure 24. The off time varies based on the
instantaneous line voltage, but the on time is kept constant.
This naturally causes the peak inductor current (ILpk) to
follow the ac line voltage.
The NCP1606 represents an ideal method to implement
this constant on time CRM control in a cost effective and
robust solution. The device incorporates an accurate
regulation circuit, a low power startup circuit, and
advanced protection features.
VOUT
Vinpk
ILpk
Iinpk
Vin(t)
IL(t)
Iin(t)
MOSFET ON
OFF
Figure 24. Inductor Waveform During CRM Operation
ERROR AMPLIFIER REGULATION
The NCP1606 is configured to regulate the boost output
voltage based on its built in error amplifier (EA). The error
amplifier ’s negative terminal is pinned out to FB, the
positive terminal is tied to a 2.5 V ± 1.6% reference, and the
output is pinned out to Control (Figure 25).
ROUT1
FB
ROUT2
CCOMP
Control
EA
−
+
2.5 V
VCONTROL
tON(max)
tON
PWM BLOCK
Slope
+
Ct
ICHARGE
tPWM
VEAL
VCONTROL
VEAH
Figure 25. Error Amplifier and On Time Regulation Circuits
A resistor divider from the boost output to the input of the
EA sets the FB level. If the output voltage is too low, then
the FB level will drop and the EA will cause the control
voltage to increase. This increases the on time of the driver,
which increases the power delivered and brings the output
back into regulation. Alternatively, if the output voltage
(and hence FB voltage) is too high, then the control level
decreases and the driver on times are shortened. In this way,
the circuit regulates the output voltage (VOUT) so that the
VOUT portion that is applied to FB through the resistor
divider ROUT1 and ROUT2 is equal to the internal reference
(2.5 V). The output voltage can then be easily set according
to the following equation:
VOUT
+
2.5
V
@
ROUT1 ) ROUT2
ROUT2
(eq. 2)
A compensation network is placed between the FB and
Control pins to reduce the speed at which the EA responds
to changes in the boost output. This is necessary due to the
nature of an active PFC circuit. The PFC stage absorbs a
sinusoidal current from a sinusoidal line voltage. Hence,
the converter provides the load with a power that matches
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11 Page |
Páginas | Total 22 Páginas | |
PDF Descargar | [ Datasheet NCP1606.PDF ] |
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