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PDF AD1994 Data sheet ( Hoja de datos )

Número de pieza AD1994
Descripción Audio Switching Amplifier
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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Audio Switching Amplifier
AD1994
FEATURES
GENERAL DESCRIPTION
Integrated stereo modulator and power stage
<0.005% THD + N
105 dB dynamic range (A-weighted)
2 × 25 W output power (6 Ω, 10% THD + N)
1 × 50 W output power (3 Ω, 10% THD + N)
RDS-ON < 0.3 Ω (per transistor)
PSRR > 65 dB
On-off-mute pop noise suppression
EMI optimized modulator
Short-circuit protection
Overtemperature protection
Low cost DMOS process
APPLICATIONS
The AD1994 is a 2-channel, bridge tied load (BTL), switching
audio power amplifier with integrated Σ-Δ modulator. The
modulator accepts a single-ended, analog input signal and
converts it to a switching waveform to drive speakers directly.
One of the two modulators can control both output stages
providing twice the current and almost twice the efficiency for
single-channel applications. Both modulators can also control
external power devices for arbitrarily high output power. A
digital, microprocessor-compatible interface provides control of
reset, mute, and PGA gain, as well as feedback signals for thermal
and overcurrent error conditions. The output stage can operate
over a power supply voltages range of 8 V to 20 V. The analog
modulator and digital logic operate from a 5 V supply.
Advanced televisions
Compact multimedia systems
Minicomponents
FUNCTIONAL BLOCK DIAGRAM
PGA1 PGA0
AVDD
www.DataSheet4U.com
DVDD
FEEDBACK
NETWORK
PVDD
AD1994
AINL
PGA
Σ-Δ
MODULATOR
A1 OUTL+
A2
MOD_FILT
AINR
CLKI
CLKO
REF_FILT
PGA
ORDER
REDUCER
Σ-Δ
MODULATOR
LEVEL
SHIFTER
AND
DEAD TIME
CONTROL
OSCILLATOR
MODE CONTROL
LOGIC AND
POP/CLICK
SUPPRESSION
VOLTAGE
REFERENCE
B1
B2
H-BRIDGE
C1
C2
D1
D2
OUTL–
OUTR+
OUTR–
AGND
Figure 1.
PGND
FEEDBACK
NETWORK
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2006 Analog Devices, Inc. All rights reserved.

1 page




AD1994 pdf
ABSOLUTE MAXIMUM RATINGS
Table 8.
Parameter
AVDD, DVDD to AGND, DGND
PVDDx to PGNDx1
AGND to DGND to PGNDx
AVDD, to DVDD
Operating Temperature Range
Storage Temperature Range
Maximum Junction Temperature
Thermal Resistance
θJA
θJC (at the Exposed Pad Surface)
θJB (on JEDEC Standard PCB)
Rating
−0.3 V to +6.5 V
−0.3 V to +30.0 V
−0.3 V to +0.3 V
−0.5 V to +0.5 V
–40°C to +85°C
–65°C to +150°C
150°C
19.2°C/W
0.9°C/W
9.7°C/W
1 Including any induced voltage due to inductive load.
AD1994
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on
the human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
Rev. 0 | Page 5 of 24

5 Page





AD1994 arduino
100
10
1
0.1
0.01
0.001
0.1
THD + N
THD
1 10
OUTPUT POWER (W)
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
Figure 22. THD and THD + N vs. Output Power, 1 kHz Sine, 4 Ω Load, PVDD = 18 V
100
10
1
0.1
0.01
0.001
0.1
THD + N
THD
1 10
OUTPUT POWER (W)
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
Figure 23. THD and THD + N vs. Output Power, 1 kHz Sine, 6 Ω Load, PVDD = 18 V
100
10
1
0.1
0.01
0.001
0.1
THD + N
THD
1 10
OUTPUT POWER (W)
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
Figure 24. THD and THD + N vs. Output Power, 1 kHz Sine, 8 Ω Load, PVDD = 18 V
AD1994
100
10
1
0.1
0.01
0.001
0.1
THD + N
THD
1 10
OUTPUT POWER (W)
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
Figure 25. THD and THD + N vs. Output Power, 1 kHz Sine, 4 Ω Load, PVDD = 20 V
100
10
1
0.1
0.01
0.001
0.1
THD + N
THD
1 10
OUTPUT POWER (W)
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
Figure 26. THD and THD + N vs. Output Power, 1 kHz Sine, 6 Ω Load, PVDD = 20 V
100
10
1
0.1
0.01
0.001
0.1
THD + N
THD
1 10
OUTPUT POWER (W)
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
Figure 27. THD and THD + N vs. Output Power, 1 kHz Sine, 8 Ω Load, PVDD = 20 V
Rev. 0 | Page 11 of 24

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