|
|
PDF WM8591 Data sheet ( Hoja de datos )
| Número de pieza | WM8591 | |
| Descripción | Stereo CODEC | |
| Fabricantes | Wolfson Microelectronics | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de WM8591 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
|
No Preview Available !
w
24-bit, 192kHz Stereo CODEC
WM8591
DESCRIPTION
FEATURES
The WM8591 is a high performance, stereo audio CODEC with
single-ended inputs and differential outputs. It is ideal for
surround sound processing applications for home hi-fi, DVD-
RW and other audio visual equipment.
•
•
Audio Performance
− 110dB SNR (‘A’ weighted @ 48kHz) DAC
− 102dB SNR (‘A’ weighted @ 48kHz) ADC
DAC Sampling Frequency: 32kHz – 192kHz
The stereo 24-bit multi-bit sigma delta ADC has programmable
gain with limiting control. Digital audio output word lengths from
16-32 bits and sampling rates from 32kHz to 96kHz are
supported.
A stereo multi-bit sigma delta DAC is used with digital audio
input word lengths from 16-32 bits and sampling rates from
32kHz to 192kHz.
The WM8591 supports fully independent sample rates for the
ADC and DAC. The audio data interface supports I2S, left
justified, right justified and DSP formats.
•
•
•
•
•
•
•
•
The device is controlled in software via a 2-wire serial interface
which provides access to all features including volume controls,
mutes, and de-emphasis facilities. The device is available in a
28-lead SSOP package.
•
•
ADC Sampling Frequency: 32kHz – 96kHz
Stereo ADC input analogue gain adjust from +24dB to –21dB in
0.5dB steps
ADC digital gain from -21.5dB to -103dB in 0.5dB steps
Programmable Limiter on ADC input.
Stereo DAC with differential analogue line outputs.
2-wire Serial Control Interface
Master or Slave Clocking Mode
Programmable Audio Data Interface Modes
− I2S, Left, Right Justified or DSP
− 16/20/24/32 bit Word Lengths
4.5V to 5.5V Analogue, 2.7V to 3.6V Digital supply Operation
28-lead SSOP Package
APPLICATIONS
www.DataSheet4U.com
BLOCK DIAGRAM
• Surround Sound AV Processors and Hi-Fi systems
• DVD-RW
WOLFSON MICROELECTRONICS plc
To receive regular email updates, sign up at http://www.wolfsonmicro.com/enews/
Production Data, December 2005, Rev 4.0
Copyright 2005 Wolfson Microelectronics plc
1 page  
Production Data
WM8591
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are stress ratings only. Permanent damage to the device may be caused by continuously operating at
or beyond these limits. Device functional operating limits and guaranteed performance specifications are given under Electrical
Characteristics at the test conditions specified.
ESD Sensitive Device. This device is manufactured on a CMOS process. It is therefore generically susceptible
to damage from excessive static voltages. Proper ESD precautions must be taken during handling and storage
of this device.
Wolfson tests its package types according to IPC/JEDEC J-STD-020B for Moisture Sensitivity to determine acceptable storage
conditions prior to surface mount assembly. These levels are:
MSL1 = unlimited floor life at <30°C / 85% Relative Humidity. Not normally stored in moisture barrier bag.
MSL2 = out of bag storage for 1 year at <30°C / 60% Relative Humidity. Supplied in moisture barrier bag.
MSL3 = out of bag storage for 168 hours at <30°C / 60% Relative Humidity. Supplied in moisture barrier bag.
The Moisture Sensitivity Level for each package type is specified in Ordering Information.
CONDITION
Digital supply voltage, DVDD
Analogue supply voltage, AVDD
Voltage range digital inputs
Voltage range analogue inputs
Master Clock Frequency
Operating temperature range, TA
Storage temperature
Notes:
1. Analogue and digital grounds must always be within 0.3V of each other.
MIN
-0.3V
-0.3V
DGND -0.3V
AGND -0.3V
-25°C
-65°C
MAX
+4.5V
+7V
DVDD + 0.3V
AVDD +0.3V
37MHz
+85°C
+150°C
w
PD Rev 4.0 December 2005
5
5 Page 
Production Data
WM8591
Figure 5 Digital Audio Data Timing – Slave Mode
Test Conditions
AVDD = 5V, DVDD = 3.3V, AGND = 0V, DGND = 0V, TA = +25oC, Slave Mode, fs = 48kHz, ADC/DACMCLK = 256fs unless
otherwise stated.
PARAMETER
SYMBOL
Audio Data Input Timing Information
ADC/DACBCLK cycle time
ADC/DACBCLK pulse width
high
tBCY
tBCH
ADC/DACBCLK pulse width
low
tBCL
DACLRC/ADCLRC set-up
time to ADC/DACBCLK
rising edge
tLRSU
DACLRC/ADCLRC hold
time from ADC/DACBCLK
rising edge
tLRH
DIN set-up time to
DACBCLK rising edge
tDS
DIN hold time from
DACBCLK rising edge
tDH
DOUT propagation delay
from ADCBCLK falling edge
tDD
TEST CONDITIONS
MIN TYP MAX UNIT
50 ns
20 ns
20 ns
10 ns
10 ns
10 ns
10 ns
0 10 ns
Table 3 Digital Audio Data Timing – Slave Mode
Note:
ADCLRC and DACLRC should be synchronous with MCLK, although the WM8591 interface is tolerant of phase variations
or jitter on these signals.
w
PD Rev 4.0 December 2005
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet WM8591.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| WM8590 | 192kHz Stereo CODEC | Wolfson Microelectronics |
| WM8591 | Stereo CODEC | Wolfson Microelectronics |
| WM8593 | Multi-Channel CODEC | Wolfson Microelectronics |
| WM8594 | Multi-Channel CODEC | Wolfson Microelectronics |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |