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PDF NBSG16 Data sheet ( Hoja de datos )
| Número de pieza | NBSG16 | |
| Descripción | SiGe Differential Receiver/Driver | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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NBSG16
2.5V/3.3V SiGe Differential
Receiver/Driver with
RSECL* Outputs
*Reduced Swing ECL
Description
The NBSG16 is a differential receiver/driver targeted for high
frequency applications. The device is functionally equivalent to the
EP16 and LVEP16 devices with much higher bandwidth and lower
EMI capabilities.
Inputs incorporate internal 50 W termination resistors and accept
NECL (Negative ECL), PECL (Positive ECL), HSTL, LVTTL,
LVCMOS, CML, or LVDS. Outputs are RSECL (Reduced Swing
ECL), 400 mV.
The VBB and VMM pins are internally generated voltage supplies
available to this device only. The VBB is used as a reference voltage
for single−ended NECL or PECL inputs and the VMM pin is used as a
reference voltage for LVCMOS inputs. For all single−ended input
conditions, the unused complementary differential input is connected
to VBB or VMM as a switching reference voltage. VBB or VMM may
also rebias AC coupled inputs. When used, decouple VBB and VMM
via a 0.01 mF capacitor and limit current sourcing or sinking to 0.5 mA.
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When not used, VBB and VMM outputs should be left open.
Features
• Maximum Input Clock Frequency > 12 GHz Typical
• Maximum Input Data Rate > 12 Gb/s Typical
• 120 ps Typical Propagation Delay
• 40 ps Typical Rise and Fall Times
• RSPECL Output with Operating Range: VCC = 2.375 V to 3.465 V
with VEE = 0 V
• RSNECL Output with RSNECL or NECL Inputs with
Operating Range: VCC = 0 V with VEE = −2.375 V to −3.465 V
• RSECL Output Level (400 mV Peak−to−Peak Output), Differential
Output Only
• 50 W Internal Input Termination Resistors
• Compatible with Existing 2.5 V/3.3 V LVEP, EP, and LVEL Devices
• VBB and VMM Reference Voltage Output
• Pb−Free Packages are Available
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MARKING DIAGRAMS*
FCBGA−16
BA SUFFIX
CASE 489
QFN−16
MN SUFFIX
CASE 485G
SG
16
ALYW
16
ÇÇÇÇ1
SG
16
ALYWG
G
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = Pb−Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
© Semiconductor Components Industries, LLC, 2006
July, 2006 − Rev. 14
1
Publication Order Number:
NBSG16/D
1 page  
NBSG16
Table 5. DC CHARACTERISTICS, INPUT WITH RSPECL OUTPUT VCC = 2.5 V; VEE = 0 V (Note 4)
−40°C
25°C
85°C
Symbol
IEE
VOH
VOUTPP
VIH
Characteristic
Negative Power Supply Current
Output HIGH Voltage (Note 5)
Output Voltage Amplitude
Input HIGH Voltage
(Single−Ended) (Note 6)
Min Typ
17 23
1450 1530
350 410
VTHR + VCC −
75 mV 1.0*
Max
29
1575
525
VCC
Min Typ
17 23
1525 1565
350 410
VTHR + VCC −
75 mV 1.0*
Max
29
1600
525
VCC
Min Typ
17 23
1550 1590
350 410
VTHR + VCC −
75 mV 1.0*
Max
29
1625
525
VCC
Unit
mA
mV
mV
V
VIL Input LOW Voltage
(Single−Ended) (Note 6)
VEE VCC − VTHR − VEE VCC − VTHR − VEE VCC − VTHR − V
1.4* 75 mV
1.4* 75 mV
1.4* 75 mV
VBB
VIHCMR
PECL Output Voltage Reference
Input HIGH Voltage Common
Mode Range (Note 7)
(Differential Configuration)
1080
1.2
1140
1200
2.5
1080
1.2
1140
1200
2.5
1080
1.2
1140
1200
2.5
mV
V
VMM
RTIN
IIH
IIL
CMOS Output Voltage Reference
VCC/2
Internal Input Termination Resistor
Input HIGH Current (@ VIH)
Input LOW Current (@ VIL)
1100
45
1250
50
30
25
1400
55
100
50
1100 1250 1400
45 50 55
30 100
25 50
1100 1250 1400 mV
45 50 55 W
30 100 mA
25 50 mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
*Typicals used for testing purposes.
4. Input and output parameters vary 1:1 with VCC. VEE can vary +0.125 V to −0.965 V.
5. All loading with 50 W to VCC − 2.0 V.
6. VTHR is the voltage applied to the complementary input, typically VBB or VMM.
7. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
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5
5 Page 
NBSG16
PACKAGE DIMENSIONS
LASER MARK FOR PIN 1
IDENTIFICATION IN
THIS AREA
−X−
−Y−
E
FCBGA−16
BA SUFFIX
PLASTIC 4X4 (mm) BGA FLIP CHIP PACKAGE
CASE 489−01
ISSUE O
D
M
K
0.20
3X e
S
M
4321
FEDUCIAL FOR PIN A1
IDENTIFICATION IN THIS AREA
A
B
C
D
VIEW M−M
3
16 X b
0.15 M Z X Y
0.08 M Z
NOTES:
1. DIMENSIONS ARE IN MILLIMETERS.
2. INTERPRET DIMENSIONS AND TOLERANCES
PER ASME Y14.5M, 1994.
3. DIMENSION b IS MEASURED AT THE MAXIMUM
SOLDER BALL DIAMETER, PARALLEL TO DATUM
PLANE Z.
4. DATUM Z (SEATING PLANE) IS DEFINED BY THE
SPHERICAL CROWNS OF THE SOLDER BALLS.
5. PARALLELISM MEASUREMENT SHALL EXCLUDE
ANY EFFECT OF MARK ON TOP SURFACE OF
PACKAGE.
MILLIMETERS
DIM MIN MAX
A 1.40 MAX
A1 0.25 0.35
A2 1.20 REF
b 0.30 0.50
D 4.00 BSC
E 4.00 BSC
e 1.00 BSC
S 0.50 BSC
A A2
5
0.15 Z
A1
4
16 X
0.10 Z
DETAIL K
ROTATED 90 _CLOCKWISE
−Z−
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11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet NBSG16.PDF ] | |
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