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PDF SA572 Data sheet ( Hoja de datos )
| Número de pieza | SA572 | |
| Descripción | Programmable Analog Compandor | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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SA572
Programmable Analog
Compandor
The SA572 is a dual-channel, high-performance gain control
circuit in which either channel may be used for dynamic range
compression or expansion. Each channel has a full-wave rectifier to
detect the average value of input signal, a linearized, temperature-
compensated variable gain cell (DG) and a dynamic time constant
buffer. The buffer permits independent control of dynamic attack and
recovery time with minimum external components and improved low
frequency gain control ripple distortion over previous compandors.
The SA572 is intended for noise reduction in high-performance
audio systems. It can also be used in a wide range of communication
systems and video recording applications.
Features
• Independent Control of Attack and Recovery Time
• Improved Low Frequency Gain Control Ripple
• Complementary Gain Compression and Expansion with
External Op Amp
• Wide Dynamic Range − Greater than 110 dB
• Temperature-Compensated Gain Control
• Low Distortion Gain Cell
• Low Noise − 6.0 mV Typical
• Wide Supply Voltage Range − 6.0 V-22 V
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• System Level Adjustable with External Components
• Pb−Free Packages are Available*
Applications
• Dynamic Noise Reduction System
• Voltage Control Amplifier
• Stereo Expandor
• Automatic Level Control
• High-Level Limiter
• Low-Level Noise Gate
• State Variable Filter
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques Reference
Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
March, 2006 − Rev. 2
1
http://onsemi.com
MARKING DIAGRAMS
16
16
1
SOIC−16 WB
D SUFFIX
CASE 751G
SA572D
AWLYYWWG
1
16
1 PDIP−16
N SUFFIX
CASE 648
16
SA572N
AWLYYWWG
1
16
16
1
TSSOP−16
DTB SUFFIX
CASE 948F
SA
572
ALYW G
G
1
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G or G = Pb−Free Package
(Note: Microdot may be in either location)
PIN CONNECTIONS
D, N, DTB Packages*
TRACK TRIM A 1
RECOV. CAP A 2
RECT. IN A 3
ATTACK CAP A 4
DG OUT A 5
THD TRIM A 6
DG IN A 7
GND 8
16 VCC
15 TRACK TRIM B
14 RECOV. CAP B
13 RECT. IN B
12 ATTACK CAP B
11 DG OUT B
10 THD TRIM B
9 DG IN B
*D package released in large SO (SOL) package only.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
Publication Order Number:
SA572/D
1 page  
SA572
The residual distortion is third harmonic distortion and
is caused by gain control ripple. In a compandor system,
available control of fast attack and slow recovery improve
ripple distortion significantly. At the unity gain level of
100 mV, the gain cell gives THD (total harmonic
distortion) of 0.17% typ. Output noise with no input signals
is only 6.0 mV in the audio spectrum (10 Hz-20 kHz). The
output current IO must feed the virtual ground input of an
operational amplifier with a resistor from output to
inverting input. The non-inverting input of the operational
amplifier has to be biased at VREF if the output current IO
is DC coupled.
V+
1
2
IG
)
1
2
IO
I1
140mA
IO
Q4
Q3
A1
+−
Q1 Q2
R1
6.8kW
IG
I2
280mA
THD
TRIM
VREF
VIN
Figure 3. Basic Gain Cell Schematic
Rectifier
The rectifier is a full-wave design as shown in Figure 4.
The input voltage is converted to current through the input
resistor R2 and turns on either Q5 or Q6 depending on the
signal polarity. Deadband of the voltage to current
converter is reduced by the loop gain of the gain block A2.
If AC coupling is used, the rectifier error comes only from
input bias current of gain block A2. The input bias current
is typically about 70 nA. Frequency response of the gain
block A2 also causes second-order error at high frequency.
The collector current of Q6 is mirrored and summed at the
collector of Q5 to form the full wave rectified output
current IR. The rectifier transfer function is:
IR
+
VIN
* VREF
R2
(eq. 3)
If VIN is AC-coupled, then the equation will be reduced
to:
IRAC
+
VIN(AVG)
R2
The internal bias scheme limits the maximum output
current IR to be around 300 mA. Within a "1.0 dB error
band the input range of the rectifier is about 52 dB.
VREF
+
A2
−
R2
VIN
V+
IR
+
VIN * VREF
R2
Q5
D7
Q6
Figure 4. Simplified Rectifier Schematic
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5
5 Page 
SA572
PACKAGE DIMENSIONS
DA
16 9
SOIC−16 WB
D SUFFIX
CASE 751G−03
ISSUE C
q
18
16X B
B
0.25 M T A S B S
14X e
SEATING
PLANE
T
C
NOTES:
1. DIMENSIONS ARE IN MILLIMETERS.
2. INTERPRET DIMENSIONS AND TOLERANCES
PER ASME Y14.5M, 1994.
3. DIMENSIONS D AND E DO NOT INLCUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE.
5. DIMENSION B DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.13 TOTAL IN
EXCESS OF THE B DIMENSION AT MAXIMUM
MATERIAL CONDITION.
MILLIMETERS
DIM MIN MAX
A 2.35 2.65
A1 0.10 0.25
B 0.35 0.49
C 0.23 0.32
D 10.15 10.45
E 7.40 7.60
e 1.27 BSC
H 10.05 10.55
h 0.25 0.75
L 0.50 0.90
q 0_ 7_
PDIP−16
CASE 648−08
ISSUE T
−A−
16 9
B
18
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEADS
WHEN FORMED PARALLEL.
4. DIMENSION B DOES NOT INCLUDE
MOLD FLASH.
5. ROUNDED CORNERS OPTIONAL.
FC
S
L
H
G
−T−
SEATING
PLANE
KJ
D 16 PL
0.25 (0.010) M T A M
M
INCHES
MILLIMETERS
DIM MIN MAX MIN MAX
A 0.740 0.770 18.80 19.55
B 0.250 0.270 6.35 6.85
C 0.145 0.175 3.69 4.44
D 0.015 0.021 0.39 0.53
F 0.040 0.70 1.02 1.77
G 0.100 BSC
2.54 BSC
H 0.050 BSC
1.27 BSC
J 0.008 0.015 0.21 0.38
K 0.110 0.130 2.80 3.30
L 0.295 0.305 7.50 7.74
M 0 _ 10 _ 0 _ 10 _
S 0.020 0.040 0.51 1.01
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11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet SA572.PDF ] | |
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