DataSheet.es    


PDF PDSP16350 Data sheet ( Hoja de datos )

Número de pieza PDSP16350
Descripción I/Q Splitter/NCO
Fabricantes Zarlink Semiconductor　
Logotipo Zarlink Semiconductor Logotipo



Hay una vista previa y un enlace de descarga de PDSP16350 (archivo pdf) en la parte inferior de esta página.


Total 13 Páginas

No Preview Available ! PDSP16350 Hoja de datos, Descripción, Manual

This product is obsolete.
This information is available for your
convenience only.
www.DataSheet4U.com
For more information on
Zarlink’s obsolete products and
replacement product lists, please visit
http://products.zarlink.com/obsolete_products/

1 page




PDSP16350 pdf
PDSP16350
SIGNAL
DESCRIPTION
DIN33:0
SIN15:0
COS15:0
CEN
MODE
JUMP
RES
CLK
OES
OEC
VIN
VOUT
GND
VCC
Data bus for the input register. This input register provides a 34 bit, incremental or absolute, phase
value, if the mode pin is low. Alternatively if the mode pin is high, it provides either an 18 bit phase
increment value, via D17:0, and a 16 bit scale value via D33:18 or a 34 bit phase increment value
depending on the JUMP input see below.
16 bit sine output data in fractional two’s complement format.
16 bit cosine output data in fractional two’s complement format.
Clock enable for the data input register. When low, data will be latched on the rising edge of the clock.
When high data will be retained in the input register.
Mode control input. When low, data in the input register is interpreted as either a 34 bit phase increment
value or a 34 bit absolute phase value. When high, the output multipliers are enabled and will scale the
waveforms with the upper 16 bits in the input register. The phase increment is loaded from the the lower
18 bits. The full 34 bit phase increment register can also be loaded using JUMP see below.
With MODE low (Frequency or Phase Modulation)
When low JUMP will allow normal phase incrementing to occur. When high, the data on the input pins
will be interpreted as a 34 bit absolute phase value to replace the present value in the accumulator.
JUMP is internally latched to match the delay through the data input register, and to allow data in the
internal pipeline to be correctly processed. CEN must also be low to latch the required data from DIN.
When Mode is high (Amplitude Modulation)
When low JUMP will allow normal phase incrementing to occur, with the phase increment value taken
from the lower 18 data inputs. When high, the data on the input pins will replace the full 34 bits of the
phase increment register. CEN must also be low to latch the required data.
When high will clear the phase accumulator and phase increment registers, after data in the internal
pipeline has been correctly processed.
Input clock.
Output enable for SIN 15:0. Outputs are high impedance when OES is high.
Output enable for COS15:0. Outputs are high impedance when OEC is high.
Valid input flag. A delayed version of this input is available on the VOUT pin, with the delay matching
the data processing pipeline delay. This input has no other internal function.
Valid output flag. See above.
Five ground pins. All must be connected.
Four +5V pins. All must be connected.
Table 1. Pin Description
4

5 Page





PDSP16350 arduino
PDSP16350
ABSOLUTE MAXIMUM RATINGS (Note 1)
Supply voltage Vcc
-0.5V to 7.0V
Input voltage VIN
-0.5V to Vcc + 0.5V
Output voltage VOUT
-0.5V to Vcc + 0.5V
Clamp diode current per pin IK (see note 2)
18mA
Static discharge voltage (HMB)
500V
Storage temperature T
S
-65°C to 150°C
Ambient temperature with power applied TAMB
Military
-55°C to +125°C
Industrial
-40°C to 85°C
Junction temperature
150°C
Package power dissipation
3500mW
Thermal resistances
Junction to Case øJC
5°C/W
NOTES
1. Exceeding these ratings may cause permanent damage.
Functional operation under these conditions is not implied.
2. Maximum dissipation or 1 second should not be ex-
ceeded, only one output to be tested at any one time.
3. Exposure to absolute maximum ratings for extended peri-
ods may affect device reliablity.
4. Vcc = Max, Outputs Unloaded, Clock Freq = Max.
5. CMOS levels are defined as
VIH = VDD - 0.5v
VIL = +0.5v
6. Current is defined as positive into the device.
7. The øJC data assumes that heat is extracted from the top
face of the package.
ELECTRICAL CHARACTERISTICS
Operating Conditions (unless otherwise stated)
Commercial: TAMB = 0°C to +70°C TJ(MAX) = 95°C VCC = 5.0V±5% Ground = 0V
Industrial:
T
AMB
=
-40°C
to
+85°C
T
J(MAX)
=
110°C
V
CC
=
5.0V±10%
Ground
=
0V
Military: TAMB = -55°C to +125°C TJ(MAX) = 150°C VCC = 5.0V±10% Ground = 0V
Static Characteristics
Characteristic
Symbol
Value
Min. Typ. Max.
Units Conditions
Output high voltage
Output low voltage
Input high voltage
Input low voltage
Input leakage current
Input capacitance
Output leakage current
Output S/C current
VOH 2.4
- V IOH = 4mA
VOL -
0.4 V IOL = -4mA
V
IH
3.0
-V
VIL -
0.8 V
IIN -10
+10 µA GND < VIN < VCC
C 10
IN
pF
IOZ -50
+50 µA GND < VOUT < VCC
ISC 40
250 mA VCC = Max
Switching Characteristics
Characteristic
D33:0 signal setup to clock rising edge
D33:0 signal hold after clock rising edge
CEN setup to clock rising edge
CEN hold after clock rising edge
JUMP, RES setup to clock rising edge
JUMP hold after clock rising edge
RES hold after clock rising edge
Clock rising edge to output valid
Clock freq
Clock High Time
Clock Low Time
OES,OEC low to data valid
OES,OEC high to data high impedance
Pipeline delay VIN to VOUT
Vcc Current (CMOS inputs)
Vcc Current (TTL inputs)
Industrial
Min.
15
4
20
0
10
6
8
5
DC
15
20
-
-
31
-
-
Typ.
Max.
-
-
-
-
-
-
-
30
20
-
-
20
20
31
430
460
Military
Units
Min.
15
4
20
0
10
6
8
5
DC
15
20
-
-
31
-
-
Typ.
Max.
- ns
- ns
- ns
- ns
- ns
- ns
- ns
30 ns
20 MHz
- ns
- ns
20 ns
20 ns
31 CLKs
450 mA
500 mA
Conditions
30pF
30pF
30pF
See Note 4
See Note 4
10

11 Page







PáginasTotal 13 Páginas
PDF Descargar[ Datasheet PDSP16350.PDF ]




Hoja de datos destacado

Número de piezaDescripciónFabricantes
PDSP16350I/Q Splitter/NCOMitel Networks Corporation
Mitel Networks Corporation
PDSP16350I/Q Splitter/NCOZarlink Semiconductor
Zarlink Semiconductor

Número de piezaDescripciónFabricantes
SLA6805M

High Voltage 3 phase Motor Driver IC.

 Sanken
Sanken
SDC1742

12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters.

 Analog Devices
Analog Devices


DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares,
permitiéndote verlos en linea o descargarlos en PDF.


DataSheet.es    |   2020   |  Privacy Policy  |  Contacto  |  Buscar