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PDF MC74VHC1GT08 Data sheet ( Hoja de datos )

Número de pieza MC74VHC1GT08
Descripción 2-Input AND Gate/CMOS Logic Level Shifter
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MC74VHC1GT08
2−Input AND Gate/CMOS
Logic Level Shifter
The MC74VHC1GT08 is an advanced high speed CMOS 2−input
AND gate fabricated with silicon gate CMOS technology. It achieves
high speed operation similar to equivalent Bipolar Schottky TTL
while maintaining CMOS low power dissipation.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output.
The device input is compatible with TTL−type input thresholds and
the output has a full 5 V CMOS level output swing. The input protection
circuitry on this device allows overvoltage tolerance on the input,
allowing the device to be used as a logic−level translator from 3 V
CMOS logic to 5 V CMOS Logic or from 1.8 V CMOS logic to 3 V
CMOS Logic while operating at the high−voltage power supply.
The MC74VHC1GT08 input structure provides protection when
voltages up to 7 V are applied, regardless of the supply voltage. This
allows the MC74VHC1GT08 to be used to interface 5 V circuits to
3 V circuits. The output structures also provide protection when
VCC = 0 V. These input and output structures help prevent device
destruction caused by supply voltage − input/output voltage mismatch,
battery backup, hot insertion, etc.
Features
High Speed: tPD = 3.5 ns (Typ) at VCC = 5 V
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Low Power Dissipation: ICC = 1 mA (Max) at TA = 25°C
TTL−Compatible Inputs: VIL = 0.8 V; VIH = 2 V
CMOS−Compatible Outputs: VOH > 0.8 VCC; VOL < 0.1 VCC @Load
Power Down Protection Provided on Inputs and Outputs
Balanced Propagation Delays
Pin and Function Compatible with Other Standard Logic Families
Chip Complexity: FETs = 64; Equivalent Gates = 15
Pb−Free Packages are Available
IN B 1
5 VCC
IN A 2
GND 3
4 OUT Y
Figure 1. Pinout (Top View)
http://onsemi.com
5
1
SC−88A/SOT−353/SC−70
DF SUFFIX
CASE 419A
MARKING
DIAGRAMS
5
VT M G
G
1
5
1
TSOP−5/SOT−23/SC−59
DT SUFFIX
CASE 483
5
VT M G
G
1
VT = Device Code
M = Date Code*
G = Pb−Free Package
(Note: Microdot may be in either location)
*Date Code orientation and/or position may vary
depending upon manufacturing location.
PIN ASSIGNMENT
1 IN B
2 IN A
3 GND
4 OUT Y
5 VCC
FUNCTION TABLE
Inputs
Output
AB
Y
LL
LH
HL
HH
L
L
L
H
IN A &
IN B
OUT Y
Figure 2. Logic Symbol
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
© Semiconductor Components Industries, LLC, 2007
February, 2007 − Rev. 10
1
Publication Order Number:
MC74VHC1GT08/D

1 page




MC74VHC1GT08 pdf
MC74VHC1GT08
PACKAGE DIMENSIONS
SC−88A, SOT−353, SC−70
CASE 419A−02
ISSUE J
A
G
54
S −B−
12
3
D 5 PL
0.2 (0.008) M B M
N
C
J
NOTES:
1. DIMENSIONING AND TOLERANCING
PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. 419A−01 OBSOLETE. NEW STANDARD
419A−02.
4. DIMENSIONS A AND B DO NOT INCLUDE
MOLD FLASH, PROTRUSIONS, OR GATE
BURRS.
INCHES
DIM MIN MAX
A 0.071 0.087
B 0.045 0.053
C 0.031 0.043
D 0.004 0.012
G 0.026 BSC
H −−− 0.004
J 0.004 0.010
K 0.004 0.012
N 0.008 REF
S 0.079 0.087
MILLIMETERS
MIN MAX
1.80 2.20
1.15 1.35
0.80 1.10
0.10 0.30
0.65 BSC
−−− 0.10
0.10 0.25
0.10 0.30
0.20 REF
2.00 2.20
HK
SOLDERING FOOTPRINT*
0.50
0.0197
0.40
0.0157
0.65
0.025
0.65
0.025
1.9
0.0748
ǒ ǓSCALE 20:1
mm
inches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
http://onsemi.com
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