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Número de pieza | MC74LVX138 | |
Descripción | 3-to-8 Line Decoder | |
Fabricantes | ON Semiconductor | |
Logotipo | ||
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No Preview Available ! MC74LVX138
3−to−8 Line Decoder
With 5V−Tolerant Inputs
The MC74LVX138 is an advanced high speed CMOS 3−to−8 line
decoder. The inputs tolerate voltages up to 7.0 V, allowing the
interface of 5.0 V systems to 3.0 V systems.
When the device is enabled, three Binary Select inputs (A0 − A2)
determine which one of the outputs (O0 − O7) will go Low. When
enable input E3 is held Low or either E2 or E1 is held High, decoding
function is inhibited and all outputs go high. E3, E2, and E1 inputs are
provided to ease cascade connection and for use as an address decoder
for memory systems.
Features
• High Speed: tPD = 5.5 ns (Typ) at VCC = 3.3 V
• Low Power Dissipation: ICC = 4 mA (Max) at TA = 25 °C
• Power Down Protection Provided on Inputs
• Balanced Propagation Delays
• Low Noise: VOLP = 0.5 V (Max)
• Pin and Function Compatible with Other Standard Logic Families
• Latchup Performance Exceeds 300 mA
• ESD Performance:
Human Body Model > 2000 V;
www.DataSheet4U.com
Machine Model > 200 V
• Pb−Free Packages are Available*
http://onsemi.com
MARKING
DIAGRAMS
SOIC−16
D SUFFIX
CASE 751B
16
LVX138
AWLYWW
1
TSSOP−16
DT SUFFIX
CASE 948F
16
LVX
138
ALYW
1
SOEIAJ−16
M SUFFIX
CASE 966
16
LVX138
ALYW
1
A = Assembly Location
WL or L = Wafer Lot
Y = Year
WW or W = Work Week
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2005
March, 2005 − Rev. 2
1
Publication Order Number:
MC74LVX138/D
1 page MC74LVX138
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎCAPACITIVE CHARACTERISTICS
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎSymbol
Parameter
TA = 25°C
Min Typ Max
TA = − 40 to 85°C
Min Max
Unit
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎCin InputCapacitance
− 4 10 − 10 pF
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎCPD Power Dissipation Capacitance (Note 2)
− 34 − − − pF
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ2. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC . CPD is used to determine the no−load dynamic
power consumption; PD = CPD VCC2 fin + ICC VCC.
NOISE CHARACTERISTICS (Input tr = tf = 3.0ns, CL = 50pF, VCC = 3.3V, Measured in SOIC Package)
TA = 25°C
Symbol
Characteristic
Typ Max
VOLP Quiet Output Maximum Dynamic VOL
− 0.5
VOLV Quiet Output Minimum Dynamic VOL
− −0.5
VIHD Minimum High Level Dynamic Input Voltage
− 2.0
VILD Maximum Low Level Dynamic Input Voltage
− 0.8
Unit
V
V
V
V
A
tPLH
O
VALID
50%
50% VCC
SWITCHING WAVEFORMS
VALID
tPHL
VCC
GND
E3
tPHL
O
50%
50% VCC
VCC
GND
tPLH
Figure 4. .
E2 or E1 50%
O
tPHL
50% VCC
Figure 6.
Figure 5. .
VCC
GND
tPLH
TEST CIRCUIT
DEVICE
UNDER
TEST
OUTPUT
TEST POINT
CL*
*Includes all probe and jig capacitance
Figure 7.
http://onsemi.com
5
5 Page |
Páginas | Total 8 Páginas | |
PDF Descargar | [ Datasheet MC74LVX138.PDF ] |
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