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Número de pieza | FDMA1032CZ | |
Descripción | Complementary PowerTrench MOSFET | |
Fabricantes | Fairchild Semiconductor | |
Logotipo | ||
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May 2006
FDMA1032CZ
20V Complementary PowerTrench® MOSFET
General Description
This device is designed specifically as a single package
solution for a DC/DC 'Switching' MOSFET in cellular
handset and other ultra-portable applications. It
features an independent N-Channel & P-Channel
MOSFET with low on-state resistance for minimum
conduction losses. The gate charge of each MOSFET
is also minimized to allow high frequency switching
directly from the controlling device. The MicroFET 2x2
package offers exceptional thermal performance for its
physical size and is well suited to switching applications.
PIN 1
S1 G1 D2
Features
• Q1: N-Channel
3.7 A, 20V. RDS(ON) = 68 mΩ @ VGS = 4.5V
RDS(ON) = 86 mΩ @ VGS = 2.5V
• Q2: P-Channel
–3.1 A, –20V. RDS(ON) = 95 mΩ @ VGS = –4.5V
RDS(ON) = 141 mΩ @ VGS = –2.5V
• Low profile – 0.8 mm maximum – in the new package
MicroFET 2x2 mm
• RoHS Compliant
D1 D2
D1 G2 S2
MicroFET 2x2
S1 1
G1 2
D2 3
6 D1
5 G2
4 S2
Absolute Maximum Ratings TA=25oC unless otherwise noted
Symbol
VDS
VGS
ID
Parameter
Drain-Source Voltage
Gate-Source Voltage
Drain Current – Continuous
– Pulsed
(Note 1a)
PD
Power Dissipation for Single Operation
(Note 1a)
(Note 1b)
TJ, TSTG
Operating and Storage Junction Temperature Range
Thermal Characteristics
RθJA Thermal Resistance, Junction-to-Ambient
RθJA Thermal Resistance, Junction-to-Ambient
RθJA Thermal Resistance, Junction-to-Ambient
RθJA Thermal Resistance, Junction-to-Ambient
(Note 1a)
(Note 1b)
(Note 1c)
(Note 1d)
Package Marking and Ordering Information
Device Marking
Device
Reel Size
032
FDMA1032CZ
7’’
Q1 Q2
20 –20
±12 ±12
3.7 –3.1
6 –6
1.4
0.7
–55 to +150
Units
V
V
A
W
°C
86 (Single Operation)
173 (Single Operation)
69 (Dual Operation)
151 (Dual Operation)
°C/W
Tape width
8mm
Quantity
3000 units
©2006 Fairchild Semiconductor Corporation
FDMA1032CZ Rev B (W)
1 page Typical Characteristics Q1 (N-Channel)
10
ID = 3.7A
8
6
VDS = 5V
15V
10V
4
2
0
0 2 4 6 8 10
Qg, GATE CHARGE (nC)
Figure 7. Gate Charge Characteristics.
100
10 RDS(ON) LIMIT
1
VGS = 4.5V
0.1 SINGLE PULSE
RθJA = 173°C/W
TA = 25°C
100us
1ms
10ms
100ms
1s
10s
DC
0.01
0.1
1 10
VDS, DRAIN-SOURCE VOLTAGE (V)
100
Figure 9. Maximum Safe Operating Area.
500
f = 1MHz
VGS = 0 V
400
300
Ciss
200
100
0
0
Crss
Coss
5 10 15
VDS, DRAIN TO SOURCE VOLTAGE (V)
20
Figure 8. Capacitance Characteristics.
50
SINGLE PULSE
RθJA = 173°C/W
40 TA = 25°C
30
20
10
0
0.0001 0.001 0.01
0.1
1
10 100 1000
t1, TIME (sec)
Figure 10. Single Pulse Maximum Power
Dissipation.
1
D = 0.5
0.2
0.1
0.1
0.05
0.02
0.01
SINGLE PULSE
0.01
0.0001
0.001
0.01
0.1 1
t1, TIME (sec)
RθJA(t) = r(t) * RθJA
RθJA =173 °C/W
P(pk)
t1
t2
TJ - TA = P * RθJA(t)
Duty Cycle, D = t1 / t2
10 100
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1b.
Transient thermal response will change depending on the circuit board design.
1000
FDMA1032CZ Rev B (W)
5 Page |
Páginas | Total 9 Páginas | |
PDF Descargar | [ Datasheet FDMA1032CZ.PDF ] |
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