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PDF DAC8560 Data sheet ( Hoja de datos )
| Número de pieza | DAC8560 | |
| Descripción | DIGITAL-TO-ANALOG CONVERTER | |
| Fabricantes | Burr-Brown | |
| Logotipo |  |
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BurrĆBrown Products
from Texas Instruments
DAC8560
DAC8560
16-Bit, Ultra-Low Glitch, Voltage Output
DIGITAL-TO-ANALOG CONVERTER
with 2.5V, 2ppm/°C Internal Reference
SLAS464 – DECEMBER 2006
FEATURES
• Relative Accuracy: 4LSB
• Glitch Energy: 0.15nV-s
• MicroPower Operation: 510µA at 2.7V
• Internal Reference:
• 2.5V Reference Voltage (enabled by default)
• 0.02% Initial Accuracy
• 2ppm/°C Temperature Drift (typ)
• 5ppm/°C Temperature Drift (max)
• 20mA Sink/Source Capability
• Power-On Reset to Zero
• Power Supply: +2.7V to +5.5V
• 16-Bit Monotonic Over Temperature Range
• Settling Time: 10µs to ±0.003% FSR
• Low-Power Serial Interface with
Schmitt-Triggered Inputs
• On-Chip Output Buffer Amplifier with
Rail-to-Rail Operation
• Power-Down Capability
• Drop-In Compatible With DAC8531/01 and
DAC8550/51
• Temperature Range: –40°C to +105°C
• Available in a Tiny MSOP-8 Package
APPLICATIONS
• Process Control
• Data Acquisition Systems
• Closed-Loop Servo-Control
• PC Peripherals
• Portable Instrumentation
DESCRIPTION
The DAC8560 is a low-power, voltage output, 16-bit
digital-to-analog converter (DAC). The DAC8560
includes a 2.5V, 2ppm/°C internal reference (enabled
by default), giving a full-scale output voltage range of
2.5V. The internal reference has an initial accuracy
of 0.02% and can source up to 20mA at the VREF pin.
The device is monotonic, provides very good
linearity, and minimizes undesired code-to-code
transient voltages (glitch). The DAC8560 uses a
versatile 3-wire serial interface that operates at clock
rates up to 30MHz. It is compatible with standard
SPI™, QSPI™, Microwire™, and digital signal
processor (DSP) interfaces.
The DAC8560 incorporates a power-on-reset circuit
that ensures the DAC output powers up at zero-scale
and remains there until a valid code is written to the
device. The DAC8560 contains a power-down
feature, accessed over the serial interface, that
reduces the current consumption of the device to
1.2µA at 5V.
The low-power consumption, internal reference, and
small footprint make this device ideal for portable,
battery-operated equipment. The power consumption
is 2.6mW at 5V, reducing to 6µW in power-down
mode.
The DAC8560 is available in an MSOP-8 package.
FUNCTIONAL BLOCK DIAGRAM
VDD
VREF
SYNC
SCLK
DIN
2.5V
Reference
Ref (+)
16-Bit DAC
16
DAC Register
16
Shift Register
PWD
Control
Resistor
Network
GND
VFB
VOUT
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
SPI, QSPI are trademarks of Motorola, Inc.
Microwire is a trademark of National Semiconductor.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2006, Texas Instruments Incorporated
1 page  
DAC8560
www.ti.com
PIN CONFIGURATION
MSOP-8
(Top View)
VDD 1
VREF 2
VFB 3
VOUT 4
DAC8560
8 GND
7 DIN
6 SCLK
5 SYNC
SLAS464 – DECEMBER 2006
PIN DESCRIPTIONS
PIN NAME
DESCRIPTION
1 VDD Power supply input, 2.7V to 5.5V.
2 VREF Reference voltage input/output.
3 VFB Feedback connection for the output amplifier. For voltage output operation, tie to VOUT externally.
4 VOUT Analog output voltage from DAC. The output amplifier has rail-to-rail operation.
Level-triggered control input (active LOW). This is the frame synchronization signal for the input data. When SYNC goes
5
SYNC
LOW, it enables the input shift register, and data is sampled on subsequent falling clock edges. The DAC output updates
following the 24th clock. If SYNC is taken HIGH before the 24th clock edge, the rising edge of SYNC acts as an interrupt,
and the write sequence is ignored by the DAC8560. Schmitt-Trigger logic Input.
6 SCLK Serial clock input. Schmitt-Trigger logic input.
7
DIN
Serial data input. Data is clocked into the 24-bit input shift register on each falling edge of the serial clock input.
Schmitt-Trigger logic Input.
8 GND Ground reference point for all circuitry on the part.
Submit Documentation Feedback
5
5 Page 
DAC8560
www.ti.com
SLAS464 – DECEMBER 2006
TYPICAL CHARACTERISTICS: DAC at VDD = 5V (continued)
At TA = +25°C, external reference used, and DAC output not loaded, unless otherwise noted.
POWER-SUPPLY CURRENT
HISTOGRAM
80
VDD = 5.5V
70 Internal VREF = 2.5V
60
50
40
30
20
10
0
450 475 500 525 550 575
IDD (mA)
Figure 25.
600
TOTAL HARMONIC DISTORTION
vs OUTPUT FREQUENCY
-40
VDD = 5V, External VREF = 4.9V
-50
-1dB FSR Digital Input, fS = 225kSPS
Measurement Bandwidth = 20kHz
-60
THD
-70
-80
2nd Harmonic
-90
-100
0
3rd Harmonic
123
fOUT (kHz)
Figure 26.
4
5
FULL-SCALE SETTLING TIME:
5V RISING EDGE
FULL-SCALE SETTLING TIME:
5V FALLING EDGE
Trigger Pulse 5V/div
Trigger Pulse 5V/div
Rising Edge
1V/div
VDD = 5V
Ext VREF = 4.096V
From Code: 0000h
To Code: FFFFh
Zoomed Rising Edge
1mV/div
Time (2ms/div)
Figure 27.
HALF-SCALE SETTLING TIME:
5V RISING EDGE
Trigger Pulse 5V/div
Rising
Edge
1V/div
VDD = 5V
Ext VREF = 4.096V
From Code: 4000h
To Code: CFFFh
Zoomed Rising Edge
1mV/div
Time (2ms/div)
Figure 29.
VDD = 5V
Ext VREF = 4.096V
From Code: FFFFh
To Code: 0000h
Falling
Edge
1V/div
Zoomed Falling Edge
1mV/div
Time (2ms/div)
Figure 28.
HALF-SCALE SETTLING TIME:
5V FALLING EDGE
Trigger Pulse 5V/div
VDD = 5V
Ext VREF = 4.096V
From Code: CFFFh
To Code: 4000h
Falling
Edge
1V/div
Zoomed Falling Edge
1mV/div
Time (2ms/div)
Figure 30.
Submit Documentation Feedback
11
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| Páginas | Total 29 Páginas | |
| PDF Descargar | [ Datasheet DAC8560.PDF ] | |
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