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PDF MAS9138 Data sheet ( Hoja de datos )
| Número de pieza | MAS9138 | |
| Descripción | ASYNCHRONOUS TO SYNCHRONOUS CONVERTER | |
| Fabricantes | MAS | |
| Logotipo |  |
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DA9138.005
12 April, 2006
MAS9138
ASYNCHRONOUS TO SYNCHRONOUS CONVERTER
• Pin compatible with MAS7838
• Interfaces a duplex asynchronous to synchronous channel
• Modem speeds of 600, 1.2k, 2.4k, 4.8k, 7.2k, 9.6k, 12k,
14.4k, 19.2k and 38.4k bps with a single 4.9152 MHz crystal
DESCRIPTION
MAS9138 is a single chip duplex asynchronous to
synchronous converter. It converts asynchronous start
stop characters to synchronous format, with stop bit
deletion when required as defined in the CCITT
recommendation V.14. On the receiver channel
MAS9138 converts the incoming synchronous data to
asynchronous start stop character format with stop bit
insertion when required as defined in the CCITT
recommendation V.14. MAS9138 implements the data
FEATURES
• Implements CCITT recommendation V.14
• Bypass operation
• Character length from 8 to 11 bits including start
stop and parity bits
• CMOS and LS-TTL compatible interface
• Low power consumption (typically 10 mW)
• No additional circuitry needed to perform conversion
• Single +3.3...+5V supply
• Operating temperature -40oC to 85oC
• 16-pin PDIP and SO package
BLOCK DIAGRAM
modes for the synchronous interface as specified in the
V.14. MAS9138 can be configured to operate at any
frequency up to 38.4 kbits/s within these modes. The
device contains a bit generator and frequency selection
logic to allow easy operation at other data rates. With
just one crystal the device can adapt to ten (10)
different bit rates so it is ideally suited to be used with
the most common modem systems ranging from V.22
to V.34.
APPLICATION
• Data communication systems
• Adapts asynchronous terminals to synchronous
modems
• Full or half card PC modems using UART as a data
source
• Simplifying data multiplexing systems
CL1
CL2
XESR
TMG
OSC
TSL
TXC
TDO
RXC
RDI
XASY
XHST
VSS
CONTROL
O
S
C
ASYNC
TO
SYNC
SYNC
TO
ASYNC
>_ 1
MAS9138
VDD
TDI
RDO
1 (10)
1 page  
Data timing
Parameter
Low to high logic transition
time
High to low logic transition
time
Symbol
tR
tR
DA9138.005
12 April, 2006
Conditions
CL = 10pF
(test conditions:VDD=3.3V - 5V, VSS=0V, -40oC to 85oC)
Min Typ Max Unit
20 ns
CL = 10 pF
20 ns
Parameter
TDO delay time after TXC
RDI setup time before RXC
RDI hold time after RXC
Symbol
T1
T2
T3
(test conditions:VDD=3.3V - 5V, VSS=0V, -40oC to 85oC, TSL = 1)
Conditions
Min Typ Max Unit
50 TTXC/16 ns
+ 350
1/4
TRXC
1/4
TRXC
ns
ns
Parameter
TDO delay time after TXC
RDI setup time before RXC
RDI hold time after RXC
Symbol
T1
T2
T3
(test conditions:VDD=3.3V - 5V, VSS=0V, -40oC to 85oC, TSL = 0, TMG = 16xTXC)
Conditions
Min Typ Max Unit
50 1/TMG ns
+ 350
1/4
TRXC
1/4
TRXC
ns
ns
TIMING DIAGRAMS
The MAS9138 shifts the data out with rising edge of TXC. The data from RDI is read in with falling edge of RXC.
TXC
TTXC
TDO
delay
T1
RXC
RDI
TRXC
T2 T3
5 (10)
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet MAS9138.PDF ] | |
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