54LVXC3245 Datasheet PDF - National Semiconductor
| Part Number | 54LVXC3245 | |
| Description | 8-Bit Dual Supply Configurable Voltage Interface | |
| Manufacturers | National Semiconductor | |
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February 1999
54LVXC3245
8-Bit Dual Supply Configurable Voltage Interface
Transceiver with TRI-STATE® Outputs
General Description
The LVXC3245 is a 24-pin dual-supply, 8-bit configurable
voltage interface transceiver suited for real time configurable
I/O applications. The VCCA pin accepts a 3V supply level.
The A port is a dedicated 3V port. The VCCB pin accepts a
3V-to-5V supply level. The B port is configured to track the
VCCB supply level respectively. A 5V level on the VCC pin will
configure the I/O pins at a 5V level and a 3V VCC will config-
ure the I/O pins at a 3V level. This device will allow the VCCB
voltage source pin and I/O pins on the B port to float when
OE is HIGH. This feature is necessary to buffer data to and
from sockets that require live insertion and removal during
normal operation.
Features
n Bidirectional interface between 3V and 3V-to-5V buses
n Control inputs compatible with TTL level
n Outputs source/sink up to 24 mA
n Available in Cerpack and CDIP package
n Implements patented EMI reduction circuitry
n Flexible VCCB operating range
n Allows B port and VCCB to float simultaneously when OE
is HIGH
n Functionally compatible with the 54 series 245
n Standard Microcircuit Drawing (SMD) 5962-9861901
Ordering Code
Order Number
54LVXC3245W-QML
54LVXC3245J-QML
Package Number
W24A
J24F
Package Description
24-Lead (0.300" Wide) Ceramic Flatpack
24-Lead Ceramic Dual-in-line
Logic Symbol
Connection Diagram
Pin Assignment for
CDIP and Cerpack
DS101032-1
Pin Descriptions
Pin Names
OE
T/R
A0– A7
B0– B7
Description
Output Enable Input
Transmit/Receive Input
Side A Inputs or 3-STATE Outputs
Side B Inputs or 3-STATE Outputs
DS101032-2
TRI-STATE® is a registered trademark of National Semiconductor Corporation
© 1999 National Semiconductor Corporation DS101032
www.national.com
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AC Electrical Characteristics
Symbol
Parameter
TA = −55˚C to +125˚C
CL = 50 pF
VCCA = 2.7V–3.6V
VCCB = 4.5V–5.5V
Min Max
TA = −55˚C to +125˚C
CL = 50 pF
VCCA = 2.7V–3.6V
VCCB = 3.0V–3.6V
Min Max
Units
tPHL Propagation Delay
1.0
9.0
1.0
9.5 ns
tPLH
A to B
1.0 9.0 1.0 9.5
tPHL Propagation Delay
1.0
9.0
1.0
9.0 ns
tPLH
B to A
1.0 9.0 1.0 9.0
tPZL Output Enable Time
1.0
9.0
1.0
10.0
ns
tPZH
OE to B
1.0 9.0 1.0 10.0
tPZL Output Enable Time
1.0
11.0
1.0
11.0
ns
tPZH
OE to A
1.0 11.0 1.0 11.0
tPHZ Output Disable Time
1.0
7.5
1.0
8.0 ns
tPLZ
OE to B
1.0 7.5 1.0 8.0
tPHZ Output Disable Time
1.0
7.0
1.0
7.0 ns
tPLZ
OE to A
1.0 7.0 1.0 7.0
tOSHL
Output to Output
tOSLH
Skew (Note 5)
1.5 1.5 ns
Data to Output
Note 5: Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The speci-
fication applies to any outputs switching in the same direction, either HIGH to LOW (tOSHL) or LOW to HIGH (tOSLH). Parameter guaranteed by design.
Capacitance
Symbol
CIN
CI/O
Parameter
Input Capacitance
Input/Output Capacitance
CPD Power Dissipation
Capacitance
Note 6: CPD is measured at 10 MHz.
Max
10.0
12.0
50
Units
pF
pF
pF
Conditions
VCC = Open
VCCA = 3.3V
VCCB = 5.0V
VCCB = 5.0V
VCCA = 3.3V
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