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PDF MAS6180 Data sheet ( Hoja de datos )
| Número de pieza | MAS6180 | |
| Descripción | AM Receiver IC | |
| Fabricantes | Micro Analog systems | |
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DA6180.001
27 December, 2006
MAS6180
AM Receiver IC
• Single Band Receiver IC
• High Sensitivity
• Very Low Power Consumption
• Wide Supply Voltage Range
• Power Down Control
• Control for AGC On
• High Selectivity by Crystal Filter
• Fast Startup Feature
DESCRIPTION
The MAS6180 AM-Receiver chip is a highly sensitive,
simple to use AM receiver specially intended to receive
time signals in the frequency range from 40 kHz to 100
kHz. Only a few external components are required for
time signal receiver. The circuit has preamplifier, wide
range automatic gain control, demodulator and output
comparator built in. The output signal can be
processed directly by an additional digital circuitry to
extract the data from the received signal. The control
for AGC (automatic gain control) can be used to switch
AGC on or off if necessary.
MAS6180 has options for compensating shunt
capacitances of different crystals (See ordering
information on page 9).
FEATURES
• Single Band Receiver IC
• Highly Sensitive AM Receiver, 0.4 µVRMS typ.
• Wide Supply Voltage Range from 1.1 V to 3.6 V
• Very Low Power Consumption
• Power Down Control
• Fast Startup
• Only a Few External Components Necessary
• Control for AGC On
• Wide Frequency Range from 40 kHz to 100 kHz
• High Selectivity by Quartz Crystal Filter
• Crystal Compensation Capacitance Options
• Differential Input
APPLICATIONS
• Single Band Time Signal Receiver WWVB (USA),
JJY (Japan), DCF77 (Germany), MSF (UK), HGB
(Switzerland) and BPC (China)
BLOCK DIAGRAM
VDD
RFIP
VDD
RFIM
QOP
QI QOM
AGC Amplifier
AON
Demodulator
&
OUT
Comparator
Power Supply/Biasing
VDD VSS PDN
AGC DEC
1 (9)
1 page  
DA6180.001
27 December, 2006
TYPICAL APPLICATION (Continued)
MAS6180A5
Note 5
Ferrite
Antenna
VDD
RFIP
VDD
RFIM
Note 1
Note 4
Optional
Control
for AGC on/hold
QOP
QI QOM
AON
AGC Amplifier
Demodulator
&
OUT
Comparator
Receiver
Output
Antenna
Frequency
Selection
VDD
1.4 V
GND
Power Supply/Biasing
VDD VSS PDN
AGC DEC
VDD
CAGC
10 µF
CDEC
47 nF OR
Note 3
Power Down /
Fast Startup
Control
VDD VDD
Note 2
AGC DEC
CAGC
+
10 µF
Note 2
CDEC
47 nF
Figure 3. Dual band application circuit of external compensation capacitance option version MAS6180A5. PMOS
switch transistor is used since RFIM input is biased close to VDD voltage.
5 (9)
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet MAS6180.PDF ] | |
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