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PDF ADS5510 Data sheet ( Hoja de datos )
| Número de pieza | ADS5510 | |
| Descripción | 125-MSPS Analog-To-Digital Converter | |
| Fabricantes | Burr-Brown | |
| Logotipo |  |
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BurrĆBrown Products
from Texas Instruments
ADS5510
11-Bit, 125-MSPS
Analog-To-Digital Converter
SLAS499 – JANUARY 2007
FEATURES
• 11-bit Resolution
• 125-MSPS Sample Rate
• High SNR: 66.3 dBFS at 100 MHz fIN
• High SFDR: 81 dBc at 100 MHz fIN
• 2.3-VPP Differential Input Voltage
• Internal Voltage Reference
• 3.3-V Single-Supply Voltage
• Analog Power Dissipation: 578 mW
• Serial Programming Interface
• TQFP-64 PowerPAD™ Package
• Pin-Compatible With:
– ADS5500 (14-Bit, 125 MSPS)
– ADS5541 (14-Bit, 105 MSPS)
– ADS5542 (14-Bit, 80 MSPS)
– ADS5520 (12-Bit, 125 MSPS)
– ADS5521 (12-Bit, 105 MSPS)
– ADS5522 (12-Bit, 80 MSPS)
• Recommended Operational Amplifiers:
THS3201, THS3202, THS4503, THS4509,
THS9001, OPA695, OPA847
APPLICATIONS
• Wireless Communication
– Communication Receivers
– Base Station Infrastructure
• Test and Measurement Instrumentation
• Single and Multichannel Digital Receivers
• Communication Instrumentation
– Radar
– Infrared
• Video and Imaging
• Medical Equipment
DESCRIPTION
The ADS5510 is a high-performance, 11 bit, 125 MSPS analog-to-digital converter (ADC). To provide a
complete converter solution, it includes a high-bandwidth linear sample-and-hold stage (S&H) and internal
reference. Designed for applications demanding the highest speed and highest dynamic performance in little
space, the ADS5510 has excellent power consumption of 578 mW at 3.3-V single-supply voltage. This allows an
even higher system integration density. The provided internal reference simplifies system design requirements.
Parallel CMOS-compatible output ensures seamless interfacing with common logic.
The ADS5510 is available in 64-pin TQFP PowerPAD package over the industrial temperature range.
CLK+
CLK−
AVDD
Timing Circuitry
DRVDD
CLKOUT
VIN+
VIN−
CM
S&H
11-Bit
Pipeline
ADC
Core
Digital
Error
Correction
Internal
Reference
Control Logic
Serial Programming Register
Output
Control
D...0
D10
ADS5510
OVR
DFS
AGND
SEN SDATA SCLK
DRGND
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerPAD is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2007, Texas Instruments Incorporated
1 page  
ADS5510
www.ti.com
SLAS499 – JANUARY 2007
DIGITAL CHARACTERISTICS
Valid over full recommended operating temperature range, AVDD = DRVDD = 3.3 V, unless otherwise noted
PARAMETER
CONDITIONS
MIN TYP
Digital Inputs
VIH High-level input voltage
VIL Low-level input voltage
IIH High-level input current
IIL Low-level input current
Input current for RESET
2.4
–20
Input capacitance
4
Digital Outputs
VOL Low-level output voltage
VOH High-level output voltage
Output capacitance
CLOAD = 10 pF
CLOAD = 10 pF
0.3
2.4 3
3
MAX
0.8
10
-10
0.4
UNIT
V
V
µA
µA
µA
pF
V
V
pF
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5
5 Page 
ADS5510
www.ti.com
SLAS499 – JANUARY 2007
PIN CONFIGURATION (continued)
PIN ASSIGNMENTS(1)
TERMINAL
NAME
NO.
AVDD
5, 7, 9, 15, 22,
24, 26, 28, 33,
34, 37, 39
AGND
6, 8, 12, 13,
14, 16, 18, 21,
23, 25, 27, 32,
36, 38
DRVDD
DRGND
49, 58
1, 42, 48, 50,
57, 59
NC 44, 45, 46
INP 19
INM 20
REFP
29
REFM
30
IREF
31
CM 17
RESET
35
OE 41
DFS
40
CLKP
10
CLKM
11
SEN
4
SDATA
3
SCLK
2
D0 (LSB) to
D10 (MSB)
47, 51-56,
60-63
OVR
64
CLKOUT
43
NO. OF
PINS
12
14
2
6
2
1
1
1
1
1
1
1
1
1
1
1
1
1
1
11
1
1
I/O DESCRIPTION
I Analog power supply
I Analog ground
I Output driver power supply
I Output driver ground
— Not connected
I Differential analog input (positive)
I Differential analog input (negative)
O Reference voltage (positive); 0.1-µF capacitor in series with a 1-Ω resistor to GND
O Reference voltage (negative); 0.1-µF capacitor in series with a 1-Ω resistor to GND
I Current set; 56-kΩ resistor to GND; do not connect capacitors
O Common-mode output voltage
I Reset (active high), 200-kΩ resistor to AVDD(2)
I Output enable (active high)
I Data format and clock out polarity select(3)(4)
I Data converter differential input clock (positive)
I Data converter differential input clock (negative)
I Serial interface chip select(4)
I Serial interface data(4)
I Serial interface clock(4)
O 11 bit parallel data output
O Over-range indicator bit
O CMOS clock out in sync with data
(1) PowerPAD is connected to analog ground.
(2) If unused, the RESET pin should be tied to AGND. See the serial programming interface section for details.
(3) Table 3 defines the voltage levels for each mode selectable via the DFS pin.
(4) Pins OE, DFS, SEN, SDATA, and SCLK have internal clamping diodes to the DRVDD supply. Any external circuit driving these pins
must also run off the same supply voltage as DRVDD.
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11
11 Page | ||
| Páginas | Total 29 Páginas | |
| PDF Descargar | [ Datasheet ADS5510.PDF ] | |
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