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Número de pieza | A8498 | |
Descripción | Wide Input Voltage 3.0 A Step Down Regulator | |
Fabricantes | Allegro MicroSystems | |
Logotipo | ||
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A8498
Wide Input Voltage 3.0 A Step Down Regulator
Features and Benefits
▪ 8 to 50 V input range
▪ Integrated DMOS switch
▪ Adjustable fixed off-time
▪ Highly efficient
▪ Adjustable 0.8 to 24 V output
Package: 8-Lead SOIC with exposed
thermal pad (suffix LJ)
Description
The A8498 is a step down regulator that will handle a wide
input operating voltage range.
The A8498 is supplied in a low-profile 8-lead SOIC with
exposed pad (package LJ). Applications include:
▪ Applications with 8 to 50 V input voltage range needing
buck regulator for 3.0 A output current
▪ Consumer equipment power
▪ Uninterruptible power supplies (lead acid battery
charger)
▪ Automotive telematics: 9 to 16 V input, with higher
voltage protection
▪ 12 V lighter-powered applications (portable DVD, etc.)
▪ Point of Sale (POS) applications
▪ Industrial applications with 24 or 36 V bus
Approximate Scale 1:1
CBOOT
0.01 μF
BOOT
VIN
RTSET
63.4 k7
ENB
A8498
LX
TSET
VBIAS
GND FB
D1
Typical Application
+42 V
CIN2
220 μF
50 V
CIN1
0.22 μF
L1
68 μH
R1
6.34 k7
R2
2 k7
VOUT
3.3 V / 3 A
ESR
COUT
220 μF
25 V
90.0
88.0
86.0
84.0
82.0
80.0
78.0
76.0
74.0
72.0
70.0
0
Efficiency vs. Output Current
VOUT (V)
5
3.3
500 1000 1500 2000 2500 3000
IOUT (mA)
Circuit for 42 V step down to 3.3 V at 3 A. Efficiency data from circuit shown in left panel. Data is for reference only.
A8498-DS, Rev. 2
1 page A8498
Wide Input Voltage 3.0 A Step Down Regulator
Functional Description
The A8498 is a fixed off-time, current-mode–controlled buck
switching regulator. The regulator requires an external clamping
diode, inductor, and filter capacitor, and operates in both continu-
ous and discontinuous modes. An internal blanking circuit is used
to filter out transients resulting from the reverse recovery of the
external clamp diode. Typical blanking time is 200 ns.
The value of a resistor between the TSET pin and ground deter-
mines the fixed off-time (see graph in the tOFF section).
VOUT. The output voltage is adjustable from 0.8 to 24 V, based on
the combination of the value of the external resistor divider and
the internal 0.8 V ±2% reference. The voltage can be calculated
with the following formula:
VOUT = VFB × (1 + R1/R2)
(1)
Light Load Regulation. To maintain voltage regulation during
light load conditions, the switching regulator enters a cycle-skip-
ping mode. As the output current decreases, there remains some
energy that is stored during the power switch minimum on-time.
In order to prevent the output voltage from rising, the regulator
skips cycles once it reaches the minimum on-time, effectively
making the off-time larger.
Soft Start. An internal ramp generator and counter allow the out-
put to slowly ramp up. This limits the maximum demand on the
external power supply by controlling the inrush current required
to charge the external capacitor and any dc load at startup.
Internally, the ramp is set to 10 ms nominal rise time. During soft
start, current limit is 3.5 A minimum.
The following conditions are required to trigger a soft start:
• VIN > 6 V
• ENB pin input falling edge
• Reset of a TSD (thermal shut down) event
VBIAS. To improve overall system efficiency, the regulator output,
VOUT, is connected to the VBIAS input to supply the operating
bias current during normal operating conditions. During startup
the circuitry is run off of the VIN supply. VBIAS should be con-
nected to VOUT when the VOUT target level is between 3.3 and
5 V. If the output voltage is less than 3.3 V, then the A8498 can
operate with an internal supply and pay a penalty in efficiency,
as the bias current will come from the high voltage supply, VIN.
VBIAS can also be supplied with an external voltage source. No
power-up sequencing is required for normal operation.
ON/OFF Control. The ENB pin is externally pulled to ground
to enable the device and begin the soft start sequence. When the
ENB is open circuited, the switcher is disabled and the output
decays to 0 V.
Protection. The buck switch will be disabled under one or more
of the following fault conditions:
• VIN < 6 V
• ENB pin = open circuit
• TSD fault
When the device comes out of a TSD fault, it will go into a soft
start to limit inrush current.
tOFF. The value of a resistor between the TSET pin and ground
determines the fixed off-time. The formula to calculate tOFF (μs)
is:
tOFF
=
RTSET
⎛
⎜
⎝
1–0.03 VBIAS
10.2 × 109
⎞
⎟
⎠
,
(2)
where RTSET (kΩ) is the value of the resistor. Results are shown
in the following graph:
Off-Time Setting versus Resistor Value
200
180
160
140
120 VBIAS = 5 V
100 VBIAS = 3.3 V
80
60
40
20
0
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
tOFF (µs)
tON. From the volt-second balance of the inductor, the turn-on
time, ton , can be calculated approximately by the equation:
tON =
(VOUT + Vf + IOUT RL) tOFF
VIN – IOUT RDS(on) – IOUT RL – VOUT
(3)
where
Vf is the voltage drop across the external Schottky diode,
RL is the winding resistance of the inductor, and
RDS(on) is the on-resistance of the switching MOSFET.
Allegro MicroSystems, Inc.
5
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
5 Page |
Páginas | Total 9 Páginas | |
PDF Descargar | [ Datasheet A8498.PDF ] |
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