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Número de pieza | ICS85356I | |
Descripción | DUAL LVPECL / ECL CLOCK MULTIPLEXER | |
Fabricantes | ICST | |
Logotipo | ||
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Integrated
Circuit
Systems, Inc.
ICS85356I
2:1, DIFFERENTIAL-TO-3.3V
DUAL LVPECL / ECL CLOCK MULTIPLEXER
GENERAL DESCRIPTION
ICS
The ICS85356I is a dual 2:1 Differential-to-LVPECL
Multiplexer and is a member of the HiPerClockSTM
HiPerClockS™ family of High Performance Clock Solutions from
ICS.The device has both common select and indi-
vidual select inputs.When COM_SEL is logic High,
the CLKxx input pairs will be passed to the output. When
COM_SEL is logic Low, the output is determined by the setting
of the SEL0 pin for channel 0 and the SEL1 pin for Channel 1.
The differential input has a common mode range that can accept
most differential input types such as LVPECL, LVDS, LVHSTL,
SSTL, and HCSL. The ICS85356I can therefore be used as a
differential translator to translate almost any differential input type
to LVPECL. It can also be used in ECL mode by setting VCC=0V
and VEE to -3.0V to - 3.8V.
The ICS85356I adds negligible jitter to the input clock and can
operate at high frequencies in excess of 900MHz thus making
it ideal for use in demanding applications such as SONET,
Fibre Channel, 1 Gigabit/10 Gigabit Ethernet.
FEATURES
• High speed differential multiplexer.
The device can be configured as a 2:1 multiplexer
• Dual 3.3V LVPECL outputs
• Selectable differential CLKxx, nCLKxx inputs
• CLKxx, nCLKxx pair can accept the following differential
input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL
• Output frequency: 900MHz (typical)
• Translates any single ended input signal to 3.3V
LVPECL levels with resistor bias on nCLKxx input
• Output skew: 75ps (typical)
• Propagation delay: 1.15ns (typical)
• LVPECL mode operating voltage supply range:
VCC = 3V to 3.8V, VEE = 0V
• ECL mode operating voltage supply range:
VCC = 0V, VEE = -3V to -3.8V
• -40°C to 85°C ambient operating temperature
• Lead-Free package available
• Compatible with MC100LVEL56
BLOCK DIAGRAM
CLK0A
nCLK0A
CLK0B
nCLK0B
SEL0
COM_SEL
SEL1
CLK1A
nCLK1A
CLK1B
nCLK1B
0
1
0
1
PIN ASSIGNMENT
Q0
nQ0
CLK0A 1
20 VCC
nCLK0A 2 19 Q0
nc 3 18 nQ0
CLK0B 4 17 SEL0
nCLK0B 5 16 COM_SEL
CLK1A 6 15 SEL1
nCLK1A 7
14 VCC
nc 8 13 Q1
CLK1B 9 12 nQ1
nCLK1B 10 11 VEE
CLK0A 1 20 VCC
nCLK0A 2 19 Q0
nc 3 18 nQ0
CLK0B 4 17 SEL0
nCLK0B 5 16 COM_SEL
CLK1A 6 15 SEL1
nCLK1A 7 14 VCC
nc 8 13 Q1
CLK1B 9 12 nQ1
nCLK1B 10 11 VEE
ICS85356I
ICS85356I
20-Lead SOIC
20-Lead TSSOP
Q1
nQ1
7.5mm x 12.8mm x 2.3mm
M Package
6.5mm x 4.4mm x 0.92mm
G Package
Top View
Top View
85356AMI
www.icst.com/products/hiperclocks.html
1
REV. A OCTOBER 7, 2004
1 page Integrated
Circuit
Systems, Inc.
ICS85356I
2:1, DIFFERENTIAL-TO-3.3V
DUAL LVPECL / ECL CLOCK MULTIPLEXER
PARAMETER MEASUREMENT INFORMATION
2V
VCC
LVPECL
VEE
-1.3V ± 0.165V
SCOPE
Qx
nQx
V
CC
nCLKxA,
nCLKxB
CLKxA,
CLKxB
V
PP
VEE
Cross Points
3.3V OUTPUT LOAD AC TEST CIRCUIT
DIFFERENTIAL INPUT LEVEL
V
CMR
nQx
Qx
nQy
Qy
t sk(o)
nCLKxA,
nCLKxB
CLKxA,
CLKxB
nQ0, nQ1
Q0, Q1
tPD
OUTPUT SKEW
Clock 20%
Outputs
80%
tR
OUTPUT RISE/FALL TIME
85356AMI
PROPAGATION DELAY
80%
tF
VSW I N G
20%
nQ0, nQ1
Q0, Q1
Pulse Width
t
PERIOD
odc = t PW
t PERIOD
OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD
www.icst.com/products/hiperclocks.html
5
REV. A OCTOBER 7, 2004
5 Page Integrated
Circuit
Systems, Inc.
PACKAGE OUTLINE - M SUFFIX FOR 20 LEAD SOIC
ICS85356I
2:1, DIFFERENTIAL-TO-3.3V
DUAL LVPECL / ECL CLOCK MULTIPLEXER
85356AMI
TABLE 8A. PACKAGE DIMENSIONS
SYMBOL
Millimeters
Minimum
Maximum
N 20
A -- 2.65
A1 0.10
--
A2 2.05
2.55
B 0.33 0.51
C 0.18 0.32
D
12.60
13.00
E 7.40 7.60
e 1.27 BASIC
H
10.00
10.65
h 0.25 0.75
L 0.40 1.27
α 0°
8°
Reference Document: JEDEC Publication 95, MS - 013, MO - 119
www.icst.com/products/hiperclocks.html
11
REV. A OCTOBER 7, 2004
11 Page |
Páginas | Total 14 Páginas | |
PDF Descargar | [ Datasheet ICS85356I.PDF ] |
Número de pieza | Descripción | Fabricantes |
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