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PDF ICS8532-01 Data sheet ( Hoja de datos )
| Número de pieza | ICS8532-01 | |
| Descripción | LVPECL FANOUT BUFFER | |
| Fabricantes | ICST | |
| Logotipo |  |
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Integrated
Circuit
Systems, Inc.
ICS8532-01
LOW SKEW, 1-TO-17
DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER
GENERAL DESCRIPTION
The ICS8532-01 is a low skew, 1-to-17, Differ-
,&6 ential-to-3.3V LVPECL Fanout Buffer and a
HiPerClockS™ member of the HiPerClockS™ family of High
Performance Clock Solutions from ICS. The
ICS8532-01 has two selectable clock inputs.
The CLK, nCLK pair can accept most standard differential
input levels. The PCLK, nPCLK pair can accept LVPECL,
CML, or SSTL input levels. The clock enable is
internally synchronized to eliminate runt pulses on the out-
puts during asynchronous assertion/deassertion of the clock
enable pin.
Guaranteed output and part-to-part skew characteristics
make the ICS8532-01 ideal for those clock distribution
applications demanding well defined performance and
repeatability.
FEATURES
• 17 differential 3.3V LVPECL outputs
• Selectable CLK, nCLK or LVPECL clock inputs
• CLK, nCLK pair can accept the following differential
input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL
• PCLK, nPCLK supports the following input types:
LVPECL, CML, SSTL
• Maximum output frequency up to 500MHz
• Translates any single-ended input signal (LVCMOS, LVTTL,
GTL) to 3.3V LVPECL levels with resistor bias on nCLK input
• Output skew: 50ps (maximum)
• Part-to-part skew: 250ps (maximum)
• Propagation delay: 2.5ns (maximum)
• 3.3V operating supply
• 0°C to 70°C ambient operating temperature
• Industrial temperature information available upon request
BLOCK DIAGRAM
CLK_EN
CLK
nCLK
PCLK
nPCLK
CLK_SEL
0
1
D
Q
LE
8532AY-01
PIN ASSIGNMENT
Q0 - Q16
nQ0 - nQ16
VCCO
nc
nc
VCC
CLK
nCLK
CLK_SEL
PCLK
nPCLK
VEE
CLK_EN
nc
VCCO
52 51 50 49 48 47 46 45 44 43 42 41 40
1 39
2 38
3 37
4 36
5 35
6 34
7 ICS8532-01 33
8 32
9 31
10 30
11 29
12 28
13 27
14 15 16 17 18 19 20 21 22 23 24 25 26
VCCO
Q6
nQ6
Q7
nQ7
Q8
nQ8
Q9
nQ9
Q10
nQ10
nc
Vcco
52-Lead LQFP
10mm x 10mm x 1.4mm package body
Y package
Top View
www.icst.com/products/hiperclocks.htlm
1
REV. B AUGUST 9, 2001
1 page  
Integrated
Circuit
Systems, Inc.
ICS8532-01
LOW SKEW, 1-TO-17
DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER
TABLE 4D. LVPECL DC CHARACTERISTICS, VCC = VCCO = 3.3V±5%, TA = 0°C TO 70°C
Symbol Parameter
Test Conditions
Minimum Typical
PCLK
IIH
Input High Current
nPCLK
VCC = VIN = 3.465V
VCC = VIN = 3.465V
PCLK
IIL
Input Low Current
nPCLK
VCC = 3.465V, VIN = 0V
VCC = 3.465V, VIN = 0V
-5
-150
VPP Peak-to-Peak Input Voltage
0.3
VCMR
Common Mode Input Voltage; NOTE 1, 2
VEE + 1.5
VOH Output High Voltage; NOTE 3
VCCO - 1.4
VOL Output Low Voltage; NOTE 3
VCCO - 2.0
VSWING
Peak-to-Peak Voltage Swing
0.6
NOTE 1: Common mode voltage is defined as VIH.
NOTE 2: For single ended applications, the maximum input voltage for PCLK, nPCLK is VCC + 0.3V.
NOTE 3: Outputs terminated with 50Ω to VCCO - 2V.
Maximum
150
5
1
VCC
VCCO - 1.0
VCCO - 1.7
0.85
Units
µA
µA
µA
µA
V
V
V
V
V
TABLE 5. AC CHARACTERISTICS, VCC = VCCO = 3.3V±5%, TA = 0°C TO 70°C
Symbol Parameter
Test Conditions
Minimum Typical Maximum
fMAX
tPD
tsk(o)
Maximum Output Frequency
Propagation Delay; NOTE 1
Output Skew; NOTE 2, 4
IJ 500MHz
1.3
500
2.5
50
tsk(pp) Part-to-Part Skew; NOTE 3, 4
250
tR Output Rise Time
20% to 80% @ 50MHz
300
tF Output Fall Time
odc Output Duty Cycle
20% to 80% @ 50MHz
0 ≤ ƒ≤ 266MHz
266 ≤ ƒ≤ 500MHz
300
48
47
50
50
All parameters measured at 500MHz unless noted otherwise.
NOTE 1: Measured from the differential input crossing point to the differential output crossing point.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions.
Measured at the output differential cross points.
NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltages
and with equal load conditions. Using the same type of inputs on each device, the outputs are measured
at the differential cross points.
NOTE 4: This parameter is defined in accordance with JEDEC Standard 65.
700
700
52
53
Units
MHz
ns
ps
ps
ps
ps
%
%
8532AY-01
www.icst.com/products/hiperclocks.htlm
5
REV. B AUGUST 9, 2001
5 Page 
Integrated
Circuit
Systems, Inc.
ICS8532-01
LOW SKEW, 1-TO-17
DIFFERENTIAL-TO-3.3V LVPECL FANOUT BUFFER
RELIABILITY INFORMATION
TABLE 7. θJAVS. AIR FLOW TABLE
q by Velocity (Linear Feet per Minute)
JA
Single-Layer PCB, JEDEC Standard Test Boards
Multi-Layer PCB, JEDEC Standard Test Boards
0
0°C/W
0°C/W
200
0°C/W
0°C/W
500
0°C/W
0°C/W
NOTE: Most all modern PCB designs use multi-layered boards, so the data in the second row will pertain to most designs.
TRANSISTOR COUNT
The transistor count for ICS8532-01 is: 1398
8532AY-01
www.icst.com/products/hiperclocks.htlm
11
REV. B AUGUST 9, 2001
11 Page | ||
| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet ICS8532-01.PDF ] | |
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