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PDF ICS853111 Data sheet ( Hoja de datos )
| Número de pieza | ICS853111 | |
| Descripción | LVPECL/ECL FANOUT BUFFER | |
| Fabricantes | ICST | |
| Logotipo |  |
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Integrated
Circuit
Systems, Inc.
www.DataSheet4U.com
PRELIMINARY
ICS853111
LOW SKEW, 1-TO-10
DIFFERENTIAL-TO-2.5V/3.3V LVPECL/ECL FANOUT BUFFER
GENERAL DESCRIPTION
The ICS853111 is a low skew, high perfor-
,&6 mance 1-to-10 Differential-to-2.5V/3.3V LVPECL/
HiPerClockS™ ECL Fanout Buffer and a member of the
HiPerClockS™ family of High Performance
Clock Solutions from ICS. The ICS853111
is characterized to operate from either a 2.5V or a 3.3V
power supply. Guaranteed output and part-to-part skew
characteristics make the ICS853111 ideal for those clock
distribution applications demanding well defined perfor-
mance and repeatability.
FEATURES
• 10 differential 2.5V/3.3V LVPECL / ECL outputs
• 2 selectable differential input pairs
• PCLKx, nPCLKx pairs can accept the following
differential input levels: LVPECL, LVDS, CML, SSTL
• Maximum output frequency: >3GHz
• Translates any single ended input signal to 3.3V
LVPECL levels with resistor bias on nPCLK input
• Output skew: TBD
• Part-to-part skew: TBD
• Propagation delay: TBD
• LVPECL mode operating voltage supply range:
VCC = 2.375V to 3.8V, VEE = 0V
• ECL mode operating voltage supply range:
VCC = 0V, VEE = -3.8V to -2.375V
• -40°C to 85°C ambient operating temperature
• Pin compatible with MC100EP111 and MC100LVEP111
BLOCK DIAGRAM
PCLK0
nPCLK0
PCLK1
nPCLK1
0
1
CLK_SEL
VBB
PIN ASSIGNMENT
Q0
nQ0
Q1
nQ1
24 23 22 21 20 19 18 17
Q2
nQ2
VCCO
nQ2
Q2
25
26
27
16 VCCO
15 Q7
14 nQ7
Q3
nQ3
nQ1 28
ICS853111
13 Q8
Q1 29
12 nQ8
Q4
nQ4
nQ0
Q0
30
31
11 Q9
10 nQ9
Q5
nQ5
VCCO 32
9 VCCO
1234 56 78
Q6
nQ6
Q7
nQ7
Q8 32-Lead LQFP
nQ8 7mm x 7mm x 1.4mm package body
Y Package
Q9 Top View
nQ9
The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial
product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice.
8 5 3 111 AY
www.icst.com/products/hiperclocks.html
REV. D JULY 22, 2003
1
1 page  
Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS853111
LOW SKEW, 1-TO-10
DIFFERENTIAL-TO-2.5V/3.3V LVPECL/ECL FANOUT BUFFER
TABLE 5. AC CHARACTERISTICS, VCC = 0V; VEE = -3.8V TO -2.375V OR VCC = 2.375 TO 3.8V; VEE = 0V
Symbol Parameter
-40°C
25°C
85°C
Min Typ Max Min Typ Max Min Typ Max
f
MAX
tPD
tsk(o)
Output Frequency
Propagation Delay; NOTE 1
Output Skew; NOTE 2, 4
>3
660
TBD
>3
695
TBD
>3
745
TBD
tsk(pp) Part-to-Part Skew; NOTE 3, 4
TBD
TBD
TBD
t /t Output Rise/Fall Time 20% to 80%
RF
TBD
TBD
TBD
All parameters are measured ≤ 1GHz unless otherwise noted.
NOTE 1: Measured from the differential input crossing point to the differential output crossing point.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions.
Measured at the output differential cross points.
NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltages
and with equal load conditions. Using the same type of inputs on each device, the outputs are measured
at the differential cross points.
NOTE 4: This parameter is defined in accordance with JEDEC Standard 65.
Units
GHz
ps
ps
ps
ps
8 5 3 111 AY
www.icst.com/products/hiperclocks.html
5
REV. D JULY 22, 2003
5 Page 
Integrated
Circuit
Systems, Inc.
PRELIMINARY
ICS853111
LOW SKEW, 1-TO-10
DIFFERENTIAL-TO-2.5V/3.3V LVPECL/ECL FANOUT BUFFER
SCHEMATIC EXAMPLE
This application note provides general design guide using
ICS853111 LVPECL buffer. Figure 6 shows a schematic ex-
ample of the ICS853111 LVPECL clock buffer. In this example,
the input is driven by an LVPECL driver. CLK_SEL is set at logic
high to select PCLK0/nPCLK0 input.
Zo = 50
+
Zo = 50
-
VCC
R2 R1
50 50
VCC
C6 (Option)
0.1u
R3
50
Zo = 50 Ohm
Zo = 50 Ohm
3.3V LVPECL
R9
50
C8 (Option)
0.1u
R10
50
R11
50
R4
1K
1
2
3
4
VCC
CLK_SEL
PCLK0
5 nPCLK0
6 VBB
7
8
PCLK1
nPCLK1
VEE
VCC
VCC=3.3V
(U1-9)
(U1-16)
VCC
(U1-25) (U1-32) (U1-1)
C1
0.1uF
C2
0.1uF
C3
0.1uF
C4
0.1uF
C5
0.1uF
Q3
nQ3
Q4
nQ4
Q5
nQ5
Q6
nQ6
24
23
22
21
20
19
18
17
U1
ICS853111
Zo = 50
Zo = 50
+
-
R8 R7
50 50
C7 (Option)
0.1u
R13
50
FIGURE 6. EXAMPLE ICS853111 LVPECL CLOCK OUTPUT BUFFER SCHEMATIC
RELIABILITY INFORMATION
TABLE 6. θJAVS. AIR FLOW TABLE
q by Velocity (Linear Feet per Minute)
JA
Single-Layer PCB, JEDEC Standard Test Boards
Multi-Layer PCB, JEDEC Standard Test Boards
0
67.8°C/W
47.9°C/W
200
55.9°C/W
42.1°C/W
500
50.1°C/W
39.4°C/W
NOTE: Most modern PCB designs use multi-layered boards. The data in the second row pertains to most designs.
TRANSISTOR COUNT
The transistor count for ICS853111 is: 1340
8 5 3 111 AY
www.icst.com/products/hiperclocks.html
11
REV. D JULY 22, 2003
11 Page | ||
| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet ICS853111.PDF ] | |
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