ICS853006 Datasheet PDF - ICST
| Part Number | ICS853006 | |
| Description | LVPECL/ECL FANOUT BUFFER | |
| Manufacturers | ICST | |
| Logo |  |
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Integrated
Circuit
Systems, Inc.
ICS853006
LOW SKEW, 1-TO-6
DIFFERENTIAL-TO-2.5V/3.3V LVPECL/ECL FANOUT BUFFER
GENERAL DESCRIPTION
ICS
The ICS853006 is a low skew, high performance
1-to-6 Differential-to-2.5V/3.3V LVPECL/ECL
HiPerClockS™ Fanout Buffer and a member of the HiPerClockS™
family of High Performance Clock Solutions from
ICS. The ICS853006 is characterized to operate
from a 2.5V or a 3.3V power supply. Guaranteed output and
part-to-part skew characteristics make the ICS853006 ideal
for those applications demanding well defined performance
and repeatability.
FEATURES
• 6 differential LVPECL outputs
• 1 differential PCLK, nPCLK input pair
• PCLK, nPCLK pair can accept the following
differential input levels: LVPECL, LVDS, CML, SSTL
• Maximum output frequency: > 2GHz
• Output skew: 30ps (maximum)
• Part-to-part skew: 150ps (maximum)
• Propagation delay: 510ps (maximum)
• LVPECL mode operating voltage supply range:
VCC = 2.375V to 3.465V, VEE = 0V
• ECL mode operating voltage supply range:
VCC = 0V, VEE = -2.375V to -3.465V
• -40°C to 85°C ambient operating temperature
BLOCK DIAGRAM
PCLK
nPCLK
VBB
PIN ASSIGNMENT
Q0
nQ0
Q1
nQ1
Q2
nQ2
Q3
nQ3
VCC 1
20 VCC
nQ0 2 19 Q5
Q0 3 18 nQ5
nQ1 4 17 Q4
Q1 5 16 nQ4
nQ2 6 15 Q3
Q2 7 14 nQ3
VCC 8
13 VCC
PCLK 9
1 2 VEE
nPCLK 10 11 VBB
Q4
nQ4
ICS853006
20-Lead TSSOP
Q5 6.5mm x 4.4mm x 0.92mm package body
nQ5 G Package
Top View
853006AG
www.icst.com/products/hiperclocks.html
1
REV. A AUGUST 18, 2004
|
| |
 
Integrated
Circuit
Systems, Inc.
ICS853006
LOW SKEW, 1-TO-6
DIFFERENTIAL-TO-2.5V/3.3V LVPECL/ECL FANOUT BUFFER
TABLE 5. AC CHARACTERISTICS, VCC = 0V; VEE = -2.375V TO -3.465V OR VCC = 2.375 TO 3.465V; VEE = 0V
Symbol Parameter
-40°C
25°C
85°C
Min Typ Max Min Typ Max Min Typ Max
fMAX
tPD
tsk(o)
Output Frequency
Propagation Delay; NOTE 1
Output Skew; NOTE 2, 4
>2 >2 >2
340 400 460 350 410 470 390 450 510
15 27
15 27
17 30
tsk(pp) Part-to-Part Skew; NOTE 3, 4
150 150
tjit
Buffer Additive Phase Jitter, RMS;
refer to Additive Phase Jitter section
0.03
0.03
0.03
t /t Output Rise/Fall Time 20% to 80% 95 150 205 95 150 205 95 150
RF
All parameters are measured ≤ 1GHz unless otherwise noted.
NOTE 1: Measured from the differential input crossing point to the differential output crossing point.
NOTE 2: Defined as skew between outputs at the same supply voltage and with equal load conditions.
Measured at the output differential cross points.
NOTE 3: Defined as skew between outputs on different devices operating at the same supply voltages
and with equal load conditions. Using the same type of inputs on each device, the outputs are measured
at the differential cross points.
NOTE 4: This parameter is defined in accordance with JEDEC Standard 65.
150
205
Units
GHz
ps
ps
ps
ps
ps
853006AG
www.icst.com/products/hiperclocks.html
5
REV. A AUGUST 18, 2004
Preview 5 Page |
Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for ICS853006 electronic component. |
| Information | Total 16 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ ICS853006.PDF Datasheet ] | |
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