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PDF IPS1041PBF Data sheet ( Hoja de datos )

Número de pieza IPS1041PBF
Descripción (IPS1041xPBF / IPS1042xPBF) SINGLE/DUAL CHANNEL INTELLIGENT POWER LOW SIDE SWITCH
Fabricantes International Rectifier 
Logotipo International Rectifier Logotipo



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Data Sheet No. PD60296_B
IPS1041(L)(R)PbF / IPS1042GPbF
SINGLE/DUAL CHANNEL
INTELLIGENT POWER LOW SIDE SWITCH
Features
Over temperature shutdown
Over current shutdown
Active clamp
Low current & logic level input
ESD protection
Optimized Turn On/Off for EMI
Diagnostic on the input current
Description
The IPS1041(L)(R)PbF and IPS1042GPbF are three
terminal Intelligent Power Switches (IPS) featuring low
side MOSFETs with over-current, over-temperature, ESD
protection and drain to source active clamp. The
IPS1042G is a dual channel device while the IPS1041 is a
single channel. These devices offer protections and the
high reliability required in harsh environments. Each
switch provides efficient protection by turning OFF the
power MOSFET when the temperature exceeds 165°C or
when the drain current reaches 4.5A. The device restarts
once the input is cycled. A serial resistance connected to
the input provides the diagnostic. The avalanche capability
is significantly enhanced by the active clamp and covers
most inductive load demagnetizations.
Product Summary
Rds(on) 100m(max.)
Vclamp
39V
Ishutdown 4.5A (typ.)
Packages
SOT-223
SO-8
D-Pak
IPS1041LPbF IPS1042GPbF IPS1041RPbF
Typical Connection
+Bat
2-4 (IPS1042G)
1 (IPS1041(L)(R)) IN
Input R
Input Signal
V Diag
Control
Load
D
S
5-6-7-8 (IPS1042G)
2 (IPS1041(L)(R))
1-3 (IPS1042G)
3 (IPS1041(L)(R))
www.irf.com
1

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IPS1041PBF pdf
IPS1041(L)(R)PbF / IPS1042GPbF
All curves are typical values. Operating in the shaded area is not recommended.
Vin
Ids
Ishutdown
Isd
t<T reset t>T reset
Tj
Tsd
165°C
Vdiag
Tshutdown
normal
fault
Figure 1 – Timing diagram
80%
Vin
20%
80%
Ids
20%
Td on
Tr-in
Tr
Vds
Td off
Tf
Figure 2 – IN rise time & switching definitions
T clamp
Vin
Ids
Vds clamp
Vds Vcc
See Application Notes to evaluate power dissipation
Figure 3 – Active clamp waveforms
www.irf.com
Rem : During active clamp,
Vload is negative
L
R
IN
5V
Vin
0V
D
S
V load
+
14V
-
Vds
Ids
Figure 4 – Active clamp test circuit
5

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IPS1041PBF arduino
IPS1041(L)(R)PbF / IPS1042GPbF
Case Outline - SO-8 - Automotive Q100 PbF MSL2 qualified
Leads and drain are plated with 100% Sn
www.irf.com
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