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PDF NET2272 Data sheet ( Hoja de datos )
| Número de pieza | NET2272 | |
| Descripción | USB 2.0 Peripheral Controller | |
| Fabricantes | NetChip | |
| Logotipo |  |
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NetChip
Technology, Inc.
335 Pioneer Way
Mt View, California 94041
(650) 526-1490 Fax (650) 526-1494
e-mail: [email protected]
Internet: www.netchip.com
NET2272 USB 2.0 Peripheral Controller
Patent Pending
For Revision 1A
Doc #: 605-0213-0110
Revision: 1.2
Date: October 15, 2003
1 page  
Specification
NET2272 USB Peripheral Controller
6.2 ENDPOINT RESPONSE REGISTERS (EPRSP_CLR, EPRSP_SET).................................................49
6.3 ENDPOINT STATUS REGISTER (EP_STAT0, EP_STAT1) ...........................................................49
7 POWER MANAGEMENT .................................................................................................................50
7.1 SUSPEND MODE...........................................................................................................................50
7.1.1 The Suspend Sequence ...........................................................................................................50
7.1.2 Host-Initiated Wake-Up.........................................................................................................51
7.1.3 Device-Remote Wake-Up.......................................................................................................51
7.1.4 Resume Interrupt ...................................................................................................................51
7.2 NET2272 POWER CONFIGURATION ............................................................................................51
7.2.1 Self-Powered Device..............................................................................................................51
7.2.2 Low-Power Modes .................................................................................................................51
7.2.2.1 USB Suspend (Unplugged from USB).............................................................................................51
7.2.2.2 Power-On Standby ...........................................................................................................................52
8 CONFIGURATION REGISTERS.....................................................................................................53
8.1 REGISTER DESCRIPTION ..............................................................................................................53
8.2 REGISTER SUMMARY...................................................................................................................53
8.2.1 Main Control Registers..........................................................................................................53
8.2.2 USB Control Registers...........................................................................................................54
8.2.3 Endpoint Registers.................................................................................................................54
8.3 NUMERIC REGISTER LISTING.......................................................................................................55
8.4 MAIN CONTROL REGISTERS ........................................................................................................56
8.4.1 (Address 00h; REGADDRPTR) Indirect Register Address Pointer.......................................56
8.4.2 (Address 01h; REGDATA) Indirect Register Data ................................................................56
8.4.3 (Address 02h; IRQSTAT0) Interrupt Status Register (low byte)............................................56
8.4.4 (Address 03h; IRQSTAT1) Interrupt Status Register (high byte)...........................................57
8.4.5 (Address 04h; PAGESEL) Endpoint Page Select Register ....................................................57
8.4.6 (Address 1Ch; DMAREQ) DMA Request Control Register...................................................58
8.4.7 (Address 1Dh; SCRATCH) Scratchpad Register ...................................................................58
8.4.8 (Address 20h; IRQENB0) Interrupt Enable Register (low byte)............................................59
8.4.9 (Address 21h; IRQENB1) Interrupt Enable Register (high byte) ..........................................59
8.4.10 (Address 22h; LOCCTL) Local Bus Control Register ...........................................................60
8.4.11 (Address 23h; CHIPREV_LEGACY) Legacy Silicon Revision Register................................60
8.4.12 (Address 24h; LOCCTL1) Local Bus Control Register 1 ......................................................61
8.4.13 (Address 25h; CHIPREV_2272) Net2272 Silicon Revision Register.....................................61
8.5 USB CONTROL REGISTERS .........................................................................................................62
8.5.1 (Address 18h; USBCTL0) USB Control Register (low byte) .................................................62
8.5.2 (Address 19h; USBCTL1) USB Control Register (high byte) ................................................62
8.5.3 (Address 1Ah; FRAME0) Frame Counter (low byte) ............................................................62
8.5.4 (Address 1Bh; FRAME1) Frame Counter (high byte) ...........................................................62
8.5.5 (Address 30h; OURADDR) Our Current USB Address.........................................................63
8.5.6 (Address 31h; USBDIAG) USB Diagnostic Register.............................................................63
8.5.7 (Address 32h; USBTEST) USB Test Modes...........................................................................64
8.5.8 (Address 33h; XCVRDIAG) Transceiver Diagnostic Register ..............................................64
8.5.9 (Address 34h; VIRTOUT0) Virtual OUT 0 ............................................................................64
8.5.10 (Address 35h; VIRTOUT1) Virtual OUT 1 ............................................................................65
8.5.11 (Address 36h; VIRTIN0) Virtual IN 0 ....................................................................................65
8.5.12 (Address 37h; VIRTIN1) Virtual IN 1 ....................................................................................65
8.5.13 (Address 40h; SETUP0) Setup Byte 0....................................................................................65
8.5.14 (Address 41h; SETUP1) Setup Byte 1....................................................................................66
8.5.15 (Address 42h; SETUP2) Setup Byte 2....................................................................................66
8.5.16 (Address 43h; SETUP3) Setup Byte 3....................................................................................66
8.5.17 (Address 44h; SETUP4) Setup Byte 4....................................................................................66
8.5.18 (Address 45h; SETUP5) Setup Byte 5....................................................................................66
______________________________________________________________________________
NetChip Technology, Inc., 2003
Patent Pending
335 Pioneer Way, Mountain View, California 94041
TEL (650) 526-1490 FAX (650) 526-1494
http://www.netchip.com
Rev 1.2, October 15, 2003
5
5 Page 
Specification
NET2272 USB Peripheral Controller
USB Cable
USB
Connector
CPU
NET2272
USB
Controller
Split Bus DMA
ASIC
(with embedded DMA)
ROM
RAM
ASIC with Split Bus DMA
______________________________________________________________________________ 11
NetChip Technology, Inc., 2003
Patent Pending
335 Pioneer Way, Mountain View, California 94041
TEL (650) 526-1490 FAX (650) 526-1494
http://www.netchip.com
Rev 1.2, October 15, 2003
11 Page | ||
| Páginas | Total 70 Páginas | |
| PDF Descargar | [ Datasheet NET2272.PDF ] | |
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