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PDF IDT74FCT16952ET Data sheet ( Hoja de datos )
| Número de pieza | IDT74FCT16952ET | |
| Descripción | (IDT74FCT16952xT) FAST CMOS 16-BIT REGISTERED TRANSCEIVER | |
| Fabricantes | IDT | |
| Logotipo |  |
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IDT74FCT16925AT/CT/ET
FAST CMOS 16-BIT REGISTERED TRANSCEIVER
FAST CMOS
16-BIT REGISTERED
TRANSCEIVER
INDUSTRIALTEMPERATURERANGE
IDT74FCT16952AT/CT/ET
FEATURES:
• 0.5 MICRON CMOS Technology
• High-speed, low-power CMOS replacement for ABT functions
• Typical tSK(o) (Output Skew) < 250ps
• Low input and output leakage ≤1µA (max.)
• High drive outputs (-32mA IOH, 64mA IOL)
• Power off disable outputs permit “live insertion”
• Typical VOLP (Output Ground Bounce) < 1.0V at VCC = 5V,
TA = 25°C
• Available in SSOP and TSSOP packages
DESCRIPTION:
The FCT16952T 16-bit registered transceiver is built using advanced
dual metal CMOS technology. These high-speed, low-power devices are
organized as two independent 8-bit D-type registered transceivers with
separate input and output control for independent control of data flow in either
direction. For example, the A-to-B Enable (xCEAB) must be low to enter
data from the A port. xCLKAB controls the clocking function. When xCLKAB
toggles from low-to-high, the data present on the A port will be clocked into
the register. xOEAB performs the output enable function on the B port. Data
flow from the B port to A port is similar but requires using xCEBA, xCLKBA,
and xOEBA inputs. Full 16-bit operation is achieved by tying the control pins
of the independent transceivers together.
The FCT16952T is ideally suited for driving high-capacitance loads and
low-impedance backplanes. The output buffers are designed with power off
disable capability allowing "live insertion" of boards when used as backplane
drivers.
FUNCTIONAL BLOCK DIAGRAM
54
1CEBA
55
1CLKBA
1
1OEAB
3
1CEAB
2
1CLKAB
56
1OEBA
5
1A1
C
CE
D
C
CE
D
52
1B1
31
2CEBA
30
2CLKBA
28
2OEAB
26
2CEAB
27
2CLKAB
29
2OEBA
15
2A1
TO SEVEN OTHER CHANNELS
C
CE
D
C
CE
D
42
2B1
TO SEVEN OTHER CHANNELS
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
2002 Integrated Device Technology, Inc.
1
JUNE 2002
DSC-5442/2
1 page  
IDT74FCT16925AT/CT/ET
FAST CMOS 16-BIT REGISTERED TRANSCEIVER
INDUSTRIALTEMPERATURERANGE
SWITCHING CHARACTERISTICS OVER OPERATING RANGE - INDUSTRIAL
FCT16952AT FCT16952CT FCT16952ET
Symbol
Parameter
Condition(1) Min.(2) Max. Min.(2) Max. Min.(2) Max.
tPLH Propagation Delay
tPHL xCLKAB, xCLKBA to xBx, xAx
tPZH Output EnableTime
tPZL xOEBA, xOEAB to xAx, xBx
CL = 50pF
RL = 500Ω
2 10
1.5 10.5
2 6.3 1.5
1.5 7 1.5
3.7
4.4
tPHZ Output Disable Time
tPLZ xOEBA, xOEAB to xAx, xBx
1.5 10 1.5 6.5 1.5 3.6
tSU Set-up Time, HIGH or LOW
2.5 — 2.5 — 1.5 —
xAx, xBx to xCLKAB, xCLKBA
tH Hold Time, HIGH or LOW
2 — 1.5 — 0 —
xAx, xBx to xCLKAB, xCLKBA
tSU Set-up Time, HIGH or LOW
3 — 3—2 —
xCEBA, xCEAB, to xCLKAB, xCLKBA
tH Hold Time, HIGH or LOW
2 — 2—0 —
xCEBA, xCEAB, to xCLKAB, xCLKBA
tW Pulse Width HIGH or LOW, xCLKAB or xCLKBA (3)
tSK(o) Output Skew(4)
3 — 3—3 —
— 0.5 — 0.5 — 0.5
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
NOTES:
1. See test circuit and waveforms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This limit is guaranteed but not tested.
4. Skew between any two outputs, of the same package, switching in the same direction. This parameter is guaranteed by design.
5
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet IDT74FCT16952ET.PDF ] | |
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