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PDF NM27C512 Data sheet ( Hoja de datos )
| Número de pieza | NM27C512 | |
| Descripción | High Performance CMOS EPROM | |
| Fabricantes | National Semiconductor | |
| Logotipo |  |
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www.DataSheet4U.com
February 1994
NM27C512
524 288-Bit (64K x 8) High Performance CMOS EPROM
General Description
The NM27C512 is a high performance 512K UV Erasable
Electrically Programmable Read Only Memory (EPROM) It
is manufactured using National’s proprietary 0 8 micron
CMOS AMGTM EPROM technology for an excellent combi-
nation of speed and economy while providing excellent reli-
ability
The NM27C512 provides microprocessor-based systems
storage capacity for portions of operating system and appli-
cation software Its 90 ns access time provides no-
wait-state operation with high-performance CPUs The
NM27C512 offers a single chip solution for the code storage
requirements of 100% firmware-based equipment Fre-
quently-used software routines are quickly executed from
EPROM storage greatly enhancing system utility
The NM27C512 is configured in the standard JEDEC
EPROM pinout which provides an easy upgrade path for
systems which are currently using standard EPROMs
The NM27C512 is one member of a high density EPROM
Family which range in densities up to 4 Megabit
Features
Y High performance CMOS
90 ns access time
Y Fast turn-off for microprocessor compatibility
Y Manufacturers identification code
Y JEDEC standard pin configuration
28-pin DIP package
32-pin chip carrier
Block Diagram
TRI-STATE is a registered trademark of National Semiconductor Corporation
NSC800TM is a trademark of National Semiconductor Corporation
AMGTM is a trademark of WSI Inc
C1995 National Semiconductor Corporation TL D 10834
TL D 10834 – 1
RRD-B30M65 Printed in U S A
1 page  
Programming Characteristics (Notes 1 and 2)
Symbol
tAS
tOES
tDS
tVCS
tAH
tDH
tCF
tPW
tOEH
tDV
tPRT
tVR
IPP
ICC
TR
VCC
VPP
tFR
VIL
VIH
tIN
tOUT
Parameter
Address Setup Time
OE Setup Time
Data Setup Time
VCC Setup Time
Address Hold Time
Data Hold Time
Chip Enable to Output Float Delay
Program Pulse Width
OE Hold Time
Data Valid from CE
OE Pulse Rise Time
during Programming
VPP Recovery Time
VPP Supply Current during
Programming Pulse
VCC Supply Current
Temperature Ambient
Power Supply Voltage
Programming Supply Voltage
Input Rise Fall Time
Input Low Voltage
Input High Voltage
Input Timing Reference Voltage
Output Timing Reference Voltage
Conditions
OE e VIL
OE e VIL
CE e VIL
OE e VPP
Min
1
1
1
1
0
1
0
95
1
50
1
20
6
12 5
5
24
08
08
Typ
100
25
6 25
12 75
0
4
Max
60
105
250
30
50
30
65
13
0 45
2
2
Units
ms
ms
ms
ms
ms
ms
ns
ms
ms
ns
ns
ms
mA
mA
C
V
V
ns
V
V
V
V
Programming Waveforms
TL D 10834 – 5
Note 1 National’s standard product warranty applies to devices programmed to specifications described herein
Note 2 VCC must be applied simultaneously or before VPP and removed simultaneously or after VPP The EPROM must not be inserted into or removed from a
board with voltage applied to VPP or VCC
Note 3 The maximum absolute allowable voltage which may be applied to the VPP pin during programming is 14V Care must be taken when switching the VPP
supply to prevent any overshoot from exceeding this 14V maximum specification At least a 0 1 mF capacitor is required across VCC to GND to suppress spurious
voltage transients which may damage the device
Note 4 Programming and program verify are tested with the fast Program Algorithm at typical power supply voltages and timings
5
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet NM27C512.PDF ] | |
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